Acer M5910(G) manual Viewing Bios checkpoints, Bootblock Initialization Code Checkpoints

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Checkpoints

A checkpoint is either a byte or word value output to I/O port 80h.The BIOS outputs checkpoints throughout bootblock and Power-On Self Test (POST) to indicate the task the system is currently executing. Checkpoint sare very useful in aiding software developers or technicians in debugging problems that occur during the pre- boot process.

Viewing BIOS checkpoints

Viewing all checkpoints generated by the BIOS requires acheckpoint card, also referred to as a POST card or POST diagnostic card. These are ISA or PCI add-in cards that show the value of I/O port 80h on a LED display. Checkpoints may appear on the bottom right corner of the screen during POST. This display method islimited, since it only displays checkpoints thatoccur after the video card has been activated.

Bootblock Initialization Code Checkpoints

The Bootblock initialization code sets up the chipset,memory, and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS.

NOTE: Please note that checkpoints may differ between different platforms based on system configuration.Checkpoints may change due to vendor requirements,system chipset or option ROMs

from add-in PCI devices.

Checkpoint

Description

 

 

Before D0

If boot block debugger is enabled, CPU cache-as-RAM functionality is enabled at this point.

 

Stack will be enabled from this point.

 

 

D0

Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other

 

CPU critical initialization. Early chipset initialization is done.

 

 

D1

Early super I/O initialization is done including RTC and keyboard controller. Serial port is

 

enabled at this point if needed for debugging. NMI is disabled. Perform keyboard controller

 

BAT test. Save power-on CPUID value in scratch CMOS. Go to flat mode with 4GB limit and

 

GA20 enabled.

 

 

D2

Verify the boot block checksum. System will hang here if checksum is bad.

 

 

D3

Disable CACHE before memory detection. Execute full memory sizing module. If memory

 

sizing module not executed, start memory refresh and do memory sizing in Boot block code.

 

Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled.

 

 

D4

Test base 512KB memory. Adjust policies and cache first 8MB. Set stack.

 

 

D5

Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS

 

now executes out of RAM. Copies compressed boot block code to memory in right

 

segments. Copies BIOS from ROM to RAM for faster access. Performs main BIOS

 

checksum and updates recovery status accordingly.

 

 

D6

Both key sequence and OEM specific method is checked to determine if BIOSrecovery is

 

forced. Main BIOS checksum is tested. If BIOS recovery is necessary,control flows to

 

checkpoint E0. See Bootblock Recovery Code Checkpoints sectionfor more information.

 

 

D7

Restore CPUID value back into register. The Bootblock-Runtime interface module is moved

 

to system memory and control is given to it. Determine whether to execute serial flash.

 

 

D8

The Runtime module is uncompressed into memory. CPUID information is stored in memory.

 

 

D9

Store the Uncompressed pointer for future use in PMM. Copying Main BIOS into memory.

 

Leaves all RAM below 1MB Read-Write including E000 and F000 shadow areas but closing

 

SMRAM.

 

 

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Chapter 4

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Contents Acer Aspire M5910G Service Guide Revision History Copyright Disclaimer Conventions Service Guide Coverage Table of Contents FRU Field Replaceable Unit List Chapter FeaturesHard disk On-Board Graphic solutionOptical disk Graphics cardPower supply System BiosUSB ports Extension slotBlock Diagram Front Panel System ComponentsRear Panel Hardware Specifications and Configurations IOS Hotkey ListMain Board Major Chips Memory Combinations System MemoryAudio Interface Sata Interface Power ManagementUSB Port Environmental RequirementsDevice Standby Mode Power Management FunctionACPI support functionGlobal Standby Mode Suspend ModeSystem Utilities Cmos Setup UtilityNavigating Through the Setup Utility Entering Cmos setupParameter Description Setup Utility MenusProduct Information Parameter Description Option Standard Cmos FeaturesEnabled Advanced Bios FeatureAdvanced Chipset Features Integrated Peripherals Power Management Setup PC Health Status Frequency/Voltage Control Setting a supervisor password Bios Security FeaturesLoad Default Settings Save & Exit Setup Exit Without Saving Disassembly Requirements System DisassemblyPre-disassembly Procedure Removing the Side Panel Removing the Heat Sink Fan Assembly Removing the Processor Removing the VGA Card Removing the TV Card Removing the Mode Card Removing the Hard Disk Drive Chapter Removing the Front Bezel Removing Rear USB Board Removing the Cables Remove System FAN Removing the Optical Drive Removing the Power Supply Removing the Memory Modules Removing the removable HDD bay Removing the Mainboard Lift the board from the chassis Remove the RTC battery System Troubleshooting Power System Check System External InspectionSystem Internal Inspection Beep Codes Viewing Bios checkpoints Bootblock Initialization Code CheckpointsCheckpoints System is waking from Acpi S3 state Checkpoint Description Bootblock Recovery Code CheckpointsBios Recovery Placement Jumper and Connector InformationLabel Components Jumper Setting Setting JumperChecking Jumper Settings Connecting Optional Devices SATA1~6 Serial ATA connectorsFUSB1~4 Front Panel USB headers SPDIFOUT1 Spdif out header COM2 Onboard serial port headerPrinter Oboard parallel port header Cintrusion Chassis detect headerTPM TPM Module Header GPIO0~1 Button recovery jumper FRU Field Replaceable Unit List Name ’TY Aspire M5910G Exploded DiagramAM551 AssyAspire M5910G Exploded DiagramAM550 Assy Components Model Name or Key Spec Acer P/N Aspire M5910G FRU ListDVD-ROM VGA NV GT340 1GB DDR5 DVI+HDMI+VGA ATX Hynix Wlan

M5910(G) specifications

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