HP Host Intrusion Detection System (HIDS) manual Contents

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Contents

 

 

1.1 PRODUCT IDENTIFICATION

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1.2 PURPOSE OF DOCUMENT

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1.2 INTENDED AUDIENCE

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1.3 GLOSSARY

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2.0 OVERVIEW

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2.1 PRODUCT OVERVIEW

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2.2 HP-UX HIDS DEPLOYMENTS

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2.3 SIZING AND TUNING OVERVIEW

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3.0 SIZING AND TUNING RECOMMENDATIONS

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3.1 SIZING GUIDELINES

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3.1.1 Single vs. Multi-Processor

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3.1.2 Number of CPUs

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3.1.3 Memory

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3.1.4 Disk Capacity

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3.2 TUNING CONSIDERATIONS

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3.2.1 Product Tuning

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3.2.1.1 Tuning the Surveillance Schedules

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3.2.1.1.1 Background

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3.2.1.1.2 Avoid duplicate copies of a template

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3.2.1.1.3 Avoid duplicate groups with overlapping functionality

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3.2.1.1.4 Race Condition Template

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3.2.1.2 Tuning Process Priority

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3.2.1.3 Tuning the HIDS System Manager (GUI)

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3.2.2 Kernel Tuning

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3.2.2.1 Tuning the Kernel Audit System (IDDS)

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3.2.2.1.1 System performance over security

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3.2.2.1.2 Security over system performance

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3.2.2.1.3 How to change from non-blocking to blocking mode

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3.2.2.2 Kernel Tunables

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3.2.2.2.1 enable_idds

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3.2.2.2.2 max_thread_proc

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3.2.2.2.3 tcp_conn_request_max

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3.2.2.2.4 secure_sid_scripts

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3.2.2.2.5 executable_stack

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3.2.2.2.6 maxdsiz

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3.2.2.3 Swap

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4.0 REFERENCE DOCUMENTS/ WEB SITES

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APPENDIX A – CPU CONSUMPTION

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CPU Consumption on PA Processors

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CPU Consumption on Itanium Processors

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APPENDIX B – RESIDENT MEMORY CONSUMPTION

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Memory Consumption on PA Processors

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Memory Consumption on Itanium Processors

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HP Company Internal

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Contents HP Company Internal Legal Notices Contents Glossary Product IdentificationPurpose of Document Intended AudienceSizing and Tuning Overview Product OverviewHP-UX Hids Deployments Sizing Guidelines Sizing and Tuning RecommendationsDisk Capacity Tuning ConsiderationsKernel Tuning System performance over security Executablestack Reference Documents/ Web sites Appendix a CPU Consumption Way PA CPU Consumption on PA ProcessorsEvent/sec Way IA CPU Consumption on Itanium ProcessorsWay IA Memory Consumption on PA Processors Appendix B Resident Memory ConsumptionResident Memory KB Memory Consumption on Itanium Processors Way IA
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