HP 9721 (AP), 6619 (AP), 6618 (AP), 8772c (US/CAN), 8770c (US/CAN) manual Codec Power Management

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Power Management

All power management of the system is under software control. The AC97 CODEC and ES1373 can be powered down separately. Neither chip loses register information when powered down.

The ES1373 can be power managed by shutting down various sub-systems. The following blocks can be individually powered down: Joystick, UART, and Serial Interface. Although these blocks can be individually disabled this will not save an appreciable amount of power. ES1373 can also individually internally shut down the PCI clock and the Crystal input clock. The PCI clock when shut down will still be active to the PCI and Interrupt/Chip Select modules. The Crystal clock when shut down will be shut down for all internal modules as well as the output connection to the AC97 CODEC.

During operation, the ES1373 ASIC will have a typical power dissipation of 150mW. In power down, the ES1373 ASIC will have a typical power dissipation of 15mW.

CODEC Power Management

The AC97 CODEC is powered down by setting bit 1 (of control bits 7 - 0) in control register 16 (hex) to a zero. The AC97 CODEC control registers are written through the CODEC Interface block at address 14 (hex).

ES1373 Power Management

As mentioned above, the Joystick, UART, and Serial Interface modules of the ES1373 chip can be individually powered down. The remaining modules will be in a powered up condition. The ES1373 modules are powered down by setting bits 6 - 2 (of control bits 31 - 0) to zero. The ES1373 control register is located in the IRQ and Chip Select Block at address 00 (hex). Note that the Serial Interface actually has three separate enable bits, one for each of the playback channels and one for the record channel.

Although these blocks can be individually disabled this will not save an appreciable amount of power. ES1373 can also individually internally shut down the PCI clock and the Crystal input clock. The PCI clock when shut down will still be active to the PCI and Interrupt/Chip Select modules. The Crystal clock when shut down will be shut down for all internal modules as well as the output connection to the AC97 CODEC.

Note: This information is Confidential and Proprietary to Creative Labs, Inc. This information is subject to change without prior notice. Released by OEM Technical Marketing Department. Please direct any inquiries to your regional OEM Sales office. Patent Pending.

Revision 1.0, 10/25/2000

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Contents Model CT5801 OEM Guide Revision Written/Changes Dated Revision History Made By Revision HistoryTable of Contents Introduction SB AudioPCI 128 Series Features SB AudioPCI 128 ConfigurationsSystem Requirements ES1373 AudioP CI Creative Stereo Digital / Analog Mixer Synthesised MusicMidi Interface Advanced Wave Table Synthesis3D Audio Technology Sampling SubsystemJoystick Port Spdif InterfaceCodec ES1373 Integrated Audio Chip General DescriptionCodec Power Management Power ManagementES1373 Integrated Audio Chip Block Diagram SB AudioPCI 128 ES1373 Series Connections and Jumpers TV Tuner J8TAD I/O J10 Adapter Cable for S/PDIF Feature J6 Molex CD-IN Pin Assignments J12 Front Panel Header SignalJ8 Molex TV Tuner Pin Assignments J10 Molex TAD Pin AssignmentsPower Consumption estimated SB AudioPCI 128 ES1373 Series SpecificationsTemperature range Typical Audio PerformanceCreative Labs, Inc Creative OfficesCreative Media K.K Creative Labs, UK
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9795c (US/CAN), 6618 (AP), 9734 (AP), 6619 (AP), 8770c (US/CAN) specifications

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