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| Appendix D | |
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| 25 | Early PCI Initialization: | |
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| 26 | 1. | If Early_Init_Onboard_Generator is not defined Onboard clock generator initialization. |
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| Disable respective clock resource to empty PCI & DIMM slots. |
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| 2. | Init onboard PWM |
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| 3. | Init onboard H/W monitor devices |
| 27 | Initialize INT 09 buffer | |
| 29 | 1. | Program CPU internal MTRR (P6 & PII) for |
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| 2. | Initialize the APIC for Pentium class CPU. |
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| 3. | Program early chipset according to CMOS setup. Example: onboard IDE controller. |
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| 4. | Measure CPU speed. |
| 2B | Invoke Video BIOS | |
| 2D | 1. | Initialize |
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| 2. | Put information on screen display, including Award title, CPU type, CPU speed, full |
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| screen logo. |
| 33 | Reset keyboard if Early_Reset_KB is defined e.g. Winbond 977 series Super I/O chips. | |
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| See also POST 63. | |
| 35 | Test DMA Channel 0 | |
| 37 | Test DMA Channel 1. | |
| 39 | Test DMA page registers. | |
| 3C | Test 8254 | |
| 3E | Test 8259 interrupt mask bits for channel 1 | |
| 40 | Test 8259 interrupt mask bits for channel 2 | |
| 43 | Test 8259 functionality | |
| 47 | Initialize EISA slot | |
| 49 | 1. | Calculate total memory by testing the last double word of each 64K page |
| 2. | Program writes allocation for AMD K5 CPU | |
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| 1. | Program MTRR of M1 CPU |
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| 2. | Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range |
| 4E | 3. | Initialize the APIC for P6 class CPU |
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| 4. | On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges |
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| between each CPU are not identical |
| 50 | Initialize USB | |
| 52 | Test all memory (clear all extended memory to 0) | |
| 53 | Clear password according to H/W jumper (Optional) | |
| 55 | Display number of processors | |
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| Display PnP logo | |
| 57 | Early ISA PnP initialization | |
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| 59 | Initialize the combined Trend | |
| 5B | (Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional) | |
| 5D | 1. | Initialize Init_Onboard_Super_IO |
| 2. | Initialize Init_Onbaord_AUDIO | |
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| 60 | Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup | |
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| 63 | Reset keyboard if Early_Reset_KB is not defined | |
| 65 | Initialize PS/2 Mouse | |
| 67 | Prepare memory size information for function call: INT 15h ax=E820h | |
| 69 | Turn on L2 cache |
AN7