Apple G3 manual Next Level

The PowerPC G3

Processor: Taking

the Macintosh to

the Next Level

A little background

Nearly six years ago, Apple, IBM, and Motorola joined forces to create a new processor technology that would bring the performance advantages of the RISC (Reduced Instruction Set Computing) architecture—at that time limited to costly workstations—to personal computers. The result of this initiative was the development of PowerPC processor tech- nology, which Apple debuted in 1994 with the introduction of the Power Macintosh line.

The initial Power Macintosh models were based on the first implementation of the new chip technology: the PowerPC 601, which was intended for use in high-end personal computers. In early 1995, Apple introduced products based on the PowerPC processor technology’s second generation—the PowerPC 603, which utilized a chip design optimized for use in low-end to midrange desktop systems and portables. This was quickly followed by the introduction of the second-generation high-end PowerPC processor: the PowerPC

604.Since then, both IBM and Motorola have made enhancements to the PowerPC 603 and

604(now the 603e and 604e), and these enhanced chips have been used in subsequent Apple systems.

PowerPC Processor Roadmap

A roadmap for the development of PowerPC processor technology,

from its inception to the end of the century.

The PowerPC G3 performance story

The emergence of the PowerPC G3 processor marks the third phase in the development of this advanced processor technology. Touted by Microprocessor Report (February 17, 1997) as “an outstanding combination of high performance and low cost,” the PowerPC G3 builds on many of the features pioneered by the PowerPC 603 and 604. However, this innovative chip differs from the earlier implementations of PowerPC processor technology in several significant ways:

•The PowerPC G3 is the first processor specifically optimized for the Mac OS.

•It incorporates an innovative backside cache design that speeds access to level 2 cache.

•It contains large (32K) on-chip level 1 data and instruction caches, for a total of 64K level 1 cache.

•It’s produced using an industry-leading 0.25-micron manufac- turing process.

PowerPC G3 optimization features include the following:

•Addition of a second integer ALU (arithmetic and logic unit), which allows the processor to execute two successive integer operations in parallel

•The ability to fetch four instructions per cycle from the cache

•A “hardware tablewalk” feature, which allows the CPU to access virtual page tables directly

•Adoption of a dynamic prediction method for improving the efficiency of branch handling

These four innovations share one very important characteristic: the capacity to provide significant performance gains. Following is a more detailed breakdown of the advantages offered by each.

Mac OS optimization. Because the earlier PowerPC processor models were essen- tially developed simultaneously with Apple’s Power Macintosh line, there was no opportu- nity to optimize these chips’ performance for running Mac OS–based applications. But that was more than half a decade ago. Today, the Power Macintosh line is well established and Mac OS–based software abounds, placing the developers of the PowerPC G3 processor in the unique position of having the luxury to consider—and optimize—chip design in light of actual software performance.

http://www.apple.com