Asus P4SP-MX 2.4.1 Chip Configuration, SDRAM Configuration [By SPD], SDRAM CAS Latency (XT), SDRAM RAS to CAS Delay (XT), SDRAM RAS Precharge Time (XT)

2.4.1 Chip Configuration

SDRAM Configuration [By SPD]

This parameter allows you to set the optimal timings for items 2–5, depending on the memory modules you are using. The default setting is [By SPD], which configures items 2 ~ 5 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Defined] [By SPD]

The SDRAM parameters (items 2 ~ 5) are user-configurable only when you set the SDRAM Configuration to [User Defined].

SDRAM CAS Latency (XT)

This item controls the latency between the SDRAM read command and the actual time the data becomes available. Configuration options: [2.5T] [2T] [1.5T] [3T]

SDRAM RAS to CAS Delay (XT)

This item controls the latency between the DDR SDRAM active command and the read/write command. Configuration options: [3T] [2T] [4T]

SDRAM RAS Precharge Time (XT)

This item controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [3T] [2T] [4T]

SDRAM Active Time (XT)

This item controls the number of DDR SDRAM clocks used for DDR SDRAM parameters. Configuration options: [6T] [7T] [5T] [4T]

SDRAM Command Lead-off Time [Auto]

Configuration options: [Auto] [2T] [1T]

2-18 Chapter 2: BIOS information