Cisco Systems 15454 Figure 2-2 TCC2P Block Diagram and Faceplate

2-15
Cisco ONS 15454 DWDM Engineering and Planning Guide, Release 7.x
July 2006
Chapter2 Cards Specifications 2.2.1 Common Control Cards
Figure 2-2 TCC2P Block Diagram and Faceplate
The TCC2P card supports multichannel, high-level data link control (HDLC) processing for the DCC.
Up to 84 DCCs can be routed over the TCC2P card and up to 84 section DCCs can be terminated at the
TCC2P card (subject to the available optical digital communication channels). The TCC2P selects and
processes 84 DCCs to facilitate remote system management interfaces.
The TCC2P card also originates and terminates a cell bus carried overthe module. The cell bus supports
linksbetween any two cards in the node, which is essential for peer-to-peer communication. Peer-to-peer
communication accelerates protection switching for redundant cards.
FAIL
A
PWR
B
ACT/STBY
ACO
CRIT
MIN
REM
SYNC
RS-232
TCP/IP
MAJ
ACO
TCC2P
LAMP
BACKPLANE
Ethernet Switch
Mate TCC2
Ethernet Port
Backplane
Ethernet Port
(Shared with
Mate TCC2)
SDRAM Memory
& Compact Flash
FPGA
TCCA ASIC
SCL Processor
Serial
Debug
Modem
Interface
EIA/TIA 232
Craft Interface
Backplane
EIA/TIA 232 Port
(Shared with
Mate TCC2)
Faceplate
EIA/TIA 232 Port
Note: Only 1 EIA/TIA 232 Port Can Be Active -
Backplane Port Will Supercede Faceplate Port
Faceplate
Ethernet Port
SCL Links to
All Cards
HDLC
Message
Bus
Mate TCC2
HDLC Link
Modem
Interface
(Not Used)
400MHz
Processor
Communications
Processor
SCC3
MCC1
FCC1
MCC2
FCC2SCC4
SMC1 SCC2
DCC
Processor
System
Timing BITS Input/
Output
Ref Clocks
(all I/O Slots)
-48V PWR
Monitors
Real Time
Clock
Ethernet
Phy
SCC1
145942