Technical Reference Guide

Compaq Deskpro 4000N and 4000S Personal Computers

First Edition – September 1997

viii

LIST OF FIGURES

FIGURE 2–1. COMPAQ DESKPRO 4000S PERSONAL COMP UTER WITH MONITOR.......................................2-1

FIGURE 2–2. CABINET LAYOUT, FRONT VIEW....................................................................................... 2-4

FIGURE 2–3. CABINET LAYOUT, REAR VIEW.........................................................................................2-5

FIGURE 2–4. CHASSIS LAYOUT, TOP VIEW............................................................................................ 2-6

FIGURE 2–5. SYSTEM BOARD LAYOUT, COMPONENT SIDE.....................................................................2-7

FIGURE 2–6. COMPAQ DESKPRO 4000N AND 4000S SYSTEM ARCHITECTURE, BLOCK DIAGRAM..............2-9

FIGURE 2–7. MICROPROCESSOR ARCHITECTURAL DIAGRAM................................................................ 2-10

FIGURE 3–1. PROCESSOR/MEMORY SUBSYSTEM ARCHITECTURE............................................................ 3-2

FIGURE 3–2. PENTIUM MMX MICROPROCESSOR INTERNAL ARCHITECTURE...........................................3-3

FIGURE 3–3. SYSTEM MEMORY MAP.......................................................................................................3-7

FIGURE 4–1. PCI BUS DEVICES AND FUNCTIONS.....................................................................................4-2

FIGURE 4–2. 32-BIT PCI BUS CONNECTOR (32-BIT TYPE)..................................................................... 4-3

FIGURE 4–3. TYPE 0 CONFIGURATION CYCLE........................................................................................4-6

FIGURE 4–4. PCI CONFIGURATION SPACE MAP......................................................................................4-7

FIGURE 4–5. ISA BUS BLOCK DIAGRAM................................................................................................4-11

FIGURE 4–6. ISA EXPANSION CONNECTOR.......................................................................................... 4-12

FIGURE 4–7. MASKABLE INTERRUPT PROCESSING, BLOCK DIAGRAM....................................................4-18

FIGURE 4–8. CONFIGURATION MEMORY MAP......................................................................................4-24

FIGURE 5–1. 40-PIN IDE CONNECTOR.................................................................................................. 5-8

FIGURE 5–1. 50-PIN IDE CONNECTOR.................................................................................................. 5-9

FIGURE 5–2. 34-PIN DISKETTE DRIVE CONNECTOR..............................................................................5-14

FIGURE 5–3. SERIAL INTERFACES BLOCK DIAGRAM.............................................................................5-15

FIGURE 5–4. SERIAL INTERFACE CONNECTOR (MALE DB-9 AS VIEWED FROM REAR OF CHASSIS)...........5-15

FIGURE 5–5. PARALLEL INTERFACE CONNECTOR (FEMALE DB-25 AS VIEWED FROM REAR OF CHASSIS)..5-27

FIGURE 5–6. 8042-TO-KEYBOARD TRANSMISSION OF CODE EDH, TIMING DIAGRAM............................5-28

FIGURE 5–7. KEYBOARD OR POINTING DEVICE INTERFACE CONNECTOR...............................................5-34

FIGURE 5–8. ETHERNET INTERFACE BLOCK DIAGRAM......................................................................... 5-35

FIGURE 5–9. ETHERNET AUI CONNECTOR (DB-15, VIEWED FROM REAR).............................................5-36

FIGURE 5–10. ETHERNET RJ-45 CONNECTOR......................................................................................5-36

FIGURE 5–11. UNIVERSAL SERIAL BUS CONNECTOR (ONE OF TWO AS VIEWED FROM REAR OF CHASSIS)... 5-38

FIGURE 6–1. S3 TRIO64V2/GX-BASED GRAPHICS SUBSYSTEM, BLOCK DIAGRAM...................................6-2

FIGURE 6–2. VGA MONITOR CONNECTOR, (FEMALE DB-15, AS VIEWED FROM THE REAR OF CHASSIS).... 6-6

FIGURE 7–1. POWER SUPPLY ASSEMBLY, BLOCK DIAGRAM....................................................................7-1

FIGURE 7–2. POWER CABLE DIAGRAM.................................................................................................. 7-4

FIGURE 7–3. LOW VOLTAGE SUPPLY, BLOCK DIAGRAM......................................................................... 7-5

FIGURE 7–4. SIGNAL DISTRIBUTION DIAGRAM.......................................................................................7-6

FIGURE C–1. KEYSTROKE PROCESSING ELEMENTS, BLOCK DIAGRAM....................................................C-2

FIGURE C–2. KEYBOARD-TO-SYSTEM TRANSMISSION OF CODE 58H, TIMING DIAGRAM..........................C-3

FIGURE C–3. U.S. ENGLISH (101-KEY) KEYBOARD KEY POSITIONS.......................................................C-4

FIGURE C–4. NATIONAL (102-KEY) KEYBOARD KEY POSITIONS............................................................C-4

FIGURE C–5. U.S. ENGLISH WINDOWS (101W-KEY) KEYBOARD KEY POSITIONS...................................C-5

FIGURE C–6. NATIONAL WINDOWS (102W-KEY) KEYBOARD KEY POSITIONS........................................C-5

FIGURE C–7. U.S. ENGLISH WINDOWS (101WE-KEY) KEYBOARD KEY POSITIONS.................................C-6

FIGURE C–8. NATIONAL WINDOWS (102WE-KEY) KEYBOARD KEY POSITIONS......................................C-6

FIGURE C–9. SCANNER ELEMENTS, BLOCK DIAGRAM..........................................................................C-14

FIGURE C–10. SCANNER OPERATION FLOW CHART..............................................................................C-16