DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
Freescale Semiconductor 2-1
2 Signal/Connection Descriptions
2.1 S ignal Groupings
The input and output signals of the DSP56364 are organized into functional groups, which are listed in
Tabl e 2-1 and illustrated in Figure 2-1.
The DSP56364 is operated from a 3.3 V supply; however, some of the inputs can tolerate 5 V. A special
notice for this feature is added to the signal descriptions of those inputs.
Table2-1 DSP56364 Functional Signal Groupings
Functional Group Number of
Signals
Detailed
Description
Power (VCC)18Tabl e 2-2
Ground (GND) 14 Ta ble 2- 3
Clock and PLL 3 Tabl e 2-4
Address bus
Port A 1
1Port A is the external memory interface port, including the external address bus, data bus, and control signals.
18 Tabl e 2-5
Data bus 8Tabl e 2-6
Bus control 6Tabl e 2-7
Interrupt and mode control 4 Tabl e 2-8
General Purpose I/O Port B2
2Port B signals are the GPIO signals.
4Tab l e 2-12
SHI 5Tabl e 2-9
ESAI Port C3
3Port C signals are the ESAI port signals multiplexed with the GPIO signals.
12 Tab l e 2-10
JTAG/OnCE Port 4 Ta bl e 2-1 1