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APPENDIX
■Interrupt Causes, Interrupt Vectors, and Interrupt Control Registers
Table D-2 summarizes the relationships among the interrupt causes, interrupt vectors, and interrupt control
registers of the MB90360 series.
Table D-2 Interrupt Causes, Interrupt Vectors, and Interrupt Control Registers (1/2)
Interrupt cause EI2OS clear DMA
channel
number
Interrupt vector Interrupt control register
Number ICR Address
Reset N #08 FFFFDCH--
INT9 instruction N #09 FFFFD8H--
Exception N #10 FFFFD4H--
Reserved N #11 FFFFD0HICR00 0000B0H
Reserved N #12 FFFFCCH
CAN 1 RX N #13 FFFFC8HICR01 0000B1H
CAN 1 TX/NS N #14 FFFFC4H
Reserved N #15 FFFFC0HICR02 0000B2H
Reserved N #16 FFFFBCH
Reserved N #17 FFFFB8HICR03 0000B3H
Reserved N #18 FFFFB4H
16-bit reload timer 2 Y1 #19 FFFFB0HICR04 0000B4H
16-bit reload timer 3 Y1 #20 FFFFACH
Reserved N #21 FFFFA8HICR05 0000B5H
Reserved N #22 FFFFA4H
PPG C/D N #23 FFFFA0HICR06 0000B6H
PPG E/F N #24 FFFF9CH
Time base timer N #25 FFFF98HICR07 0000B7H
External interrupt 8 to 11 Y1 #26 FFFF94H
Watch timer N #27 FFFF90HICR08 0000B8H
External interrupt 12 to 15 Y1 #28 FFFF8CH
A/D converter Y1 #29 FFFF88HICR09 0000B9H
I/O timer 0 N #30 FFFF84H
Reserved N #31 FFFF80HICR10 0000BAH
Reserved N #32 FFFF7CH
Input capture 0 to 3 Y1 #33 FFFF78HICR11 0000BBH
Reserved N #34 FFFF74H
UART 0 RX Y2 #35 FFFF70HICR12 0000BCH
UART 0 TX Y 1 #36 FFFF6CH