
60
CHAPTER 3 INTERRUPTS
INT 25 Timebase timer 3
ICR07 0000B7H
FFFF98HFFFF99HFFFF9AHUnused
INT 26 External interrupt
8 to 11 FFFF94HFFFF95HFFFF96HUnused
INT 27 Watch timer
ICR08 0000B8H
FFFF90HFFFF91HFFFF92HUnused
INT 28 External interrupt
12 to 15 FFFF8CHFFFF8DHFFFF8EHUnused
INT 29 A/D converter ICR09 0000B9HFFFF88HFFFF89HFFFF8AHUnused
INT 30 I/O timer 0 FFFF84HFFFF85HFFFF86HUnused
INT 31 Reserved ICR10 0000BAHFFFF80HFFFF81HFFFF82HUnused
INT 32 Reserved FFFF7CHFFFF7DHFFFF7EHUnused
INT 33 Input capture 0 to 3 ICR11 0000BBHFFFF78HFFFF79HFFFF7AHUnused
INT 34 Reserved FFFF74HFFFF75HFFFF76HUnused
INT 35 UART 0 reception ICR12 0000BCHFFFF70HFFFF71HFFFF72HUnused
INT 36 UART 0 transmission FFFF6CHFFFF6DHFFFF6EHUnused
INT 37 UART 1 reception ICR13 0000BDHFFFF68HFFFF69HFFFF6AHUnused
INT 38 UART 1 transmission FFFF64HFFFF65HFFFF66HUnused
INT 39 Reserved ICR14 0000BEHFFFF60HFFFF61HFFFF62HUnused
INT 40 Reserved FFFF5CHFFFF5DHFFFF5EHUnused
INT 41 Flash memory
ICR15 0000BFH
FFFF58HFFFF59HFFFF5AHUnused
INT 42 Delayed interrupt
generation module FFFF54HFFFF55HFFFF56HUnused
INT 43 -- -- -- FFFF50HFFFF51HFFFF52HUnused
.
.
.-- -- -- .
.
.
.
.
.
.
.
.
.
.
.
INT 254 -- -- -- FFFC04HFFFC05HFFFC06HUnused
INT 255 -- -- -- FFFC00HFFFC01HFFFC02HUnused
*: When PCB is FFH, the vector area for the CALLV instruction overlaps that for INT #vct8 (#0 to #7). Care must be taken
when using the CALLV instruction.
Table 3.2-1 Interrupt Vector (2/2)
Interrupt
request Interrupt cause
Interrupt control
register Vecto r
address
lower
Vect or
address
middle
Vecto r
address
upper
Mode
register
Number Address