bclr
Branch Conditional to Link Register
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 279 of 589
Table9-10. Extended Mnemonics for bclr, bclrl
Mnemonic Operands Function Other Registers
Altered
blr Branch unconditionally to address in LR.
Extended mnemonic for
bclr 20,0
blrl Extended mnemonic for
bclrl 20,0 (LR) CIA+ 4.
bdnzlr
Decrement CTR.
Branch if CTR0 to address in LR.
Extended mnemonic for
bclr 16,0
bdnzlrl Extended mnemonic for
bclrl 16,0 (LR) CIA+ 4.
bdnzflr
cr_bit
Decrement CTR.
Branch if CTR0 AND CRcr_bit = 0 to address in LR.
Extended mnemonic for
bclr 0,cr_bit
bdnzflrl Extended mnemonic for
bclrl 0,cr_bit (LR) CIA+ 4.
bdnztlr
cr_bit
Decrement CTR.
Branch if CTR0 AND CRcr_bit = 1 to address in LR.
Extended mnemonic for
bclr 8,cr_bit
bdnztlrl Extended mnemonic for
bclrl 8,cr_bit (LR) CIA+ 4.
bdzlr
Decrement CTR.
Branch if CTR= 0 to address in LR.
Extended mnemonic for
bclr 18,0
bdzlrl Extended mnemonic for
bclrl 18,0 (LR) CIA+ 4.
bdzflr
cr_bit
Decrement CTR.
Branch if CTR= 0 ANDCRcr_bit = 0 to address in LR.
Extended mnemonic for
bclr 2,cr_bit
bdzflrl Extended mnemonic for
bclrl 2,cr_bit (LR) CIA+ 4.
bdztlr
cr_bit
Decrement CTR.
Branch if CTR= 0 ANDCRcr_bit = 1 to address in LR.
Extended mnemonic for
bclr 10,cr_bit
bdztlrl Extended mnemonic for
bclrl 10,cr_bit (LR) CIA+ 4.