User’s Manual
Preliminary PPC440x5 CPU Core
instalfa.fm.
September 12, 2002 Page 545 of 589
mr
RT, RS
Move register.
(RT) ←(RS)
Extended mnemonic for
or RT,RS,RS 392
mr. Extended mnemonic for
or. RT,RS,RS CR[CR0]
msync
Synchronization. All instructions that precedemsync complete
before any instructions that followmsync begin.
Whenmsync completes, all storage accesses initiated prior to
msync will have completed.
366
mtcr RS
Move to Condition Register.
Extended mnemonic for
mtcrf 0xFF,RS 367
mtcrf FXM, RS
Move some or all of the contents of RS into CR as specified by
FXM field,
mask ←4(FXM0)|| 4(FXM1)|| ... ||
4(FXM6)|| 4(FXM7).
(CR)←((RS) ∧mask) ∨(CR) ∧¬mask).
367
mtdcr DCRN, RS Move to DCR from RS,
(DCR(DCRN)) ←(RS). 368
mtmsr RS Move to MSR from RS,
(MSR) ←(RS). 369
TableA-1. PPC440x5 Instruction Syntax Summary (continued)
Mnemonic Operands Function Other Registers
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