17

TK-480/481
CIRCUIT DESCRIPTION

Fig. 8 PLL block diagram

6.Control Circuit
The control circuit consists of microprocessor (IC15) and
its peripheral circuits. It controls the TX-RX unit and trans-
fers data to and from the display unit. IC15 mainly performs
the following;
1) Switching between transmission and reception by PTT
signal input.
2) Reading system, group, frequency, and program data
from the memory circuit.
3) Sending frequency program data to the PLL.
4) Controlling squelch on/off by the DC voltage from the
squelch circuit.
5) Controlling the audio mute circuit by decode data in-
put.
6) Transmitting tone and encode data.

6-1. Memory circuit

Memory circuit consists of the CPU (IC15) and a flash
memory (IC17), a flash memory has a capacity of 2M bits
that contains the transceiver control program for the CPU
and data such as transceiver channels and operating fea-
tures.
This program can be easily written from an external de-
vices. The data, such as operating status, is programmed
into the EEPROM (IC16).

•Flash Memory

Note : The flash memory holds data such as written with
the FPU (KPG-49D), firmware program (User mode, Test
mode, Tuning mode, etc.) This data must be rewritten when
replacing the flash memory.

•EEPROM

Note : The EEPROM stores tuning data (Deviation, Squelch,
etc.).
Realign the transceiver after replacing the EEPROM.
VCO
IC14 Q10
BUFF
Q17
BUFF
D4
SW
D5
SW
Q8
LPF
PLL
IC11
CV
BUFF
VCXO MB IC1
FC
BAL
DT,CP,EP
UL
CPU
IC15
To
drive
amp
To mixer
TA
TA
(TA : Low)
18
5
8

Fig. 9 Memory circuit

CPU
FLASH
IC15
IC17
EEPROM
IC16
5.Frequency Synthesizer Unit

5-1. Frequency synthesizer

The frequency synthesizer consists of the VCXO (X2),
VCO (IC14), PLL IC (IC11) and buffer amplifiers.
The VCXO generates 16.8MHz. The frequency stability is
1.5ppm within the temperature range of –30 to +60°C. The
frequency tuning and modulation of the VCXO are done to
apply a voltage to pin 1 of the VCXO. The output of the
VCXO is applied to pin 8 of the PLL IC.
The TK-480’s VCO covers a dual range of the 806~
825MHz, and the 851~870MHz. The VCO generates
806.15~825.15MHz for providing to the first local signal in
receive. In TA mode, the pin 1 of the VCO goes low and the
VCO generates 851~870MHz.
The TK-481’s VCO covers a dual range of the 896~
902MHz, and the 935~941MHz. The VCO generates
890.15~896.15MHz for providing to the first local signal in
receive. In TA mode, the pin 1 of the VCO goes low and the
VCO generates 935~941MHz.
The output of the VCO is amplified by the buffer amplifier
(Q8) and routed to the pin 5 of the PLL IC. Also the output of
the VCO is amplified by the two-buffer amplifier (Q10, Q17)
and routed to the next stage according to T/R switch (D4,
D5).
The PLL IC consists of a prescaler, fractional divider, ref-
erence divider, phase comparator, charge pump. This PLL
IC is fractional-N type synthesizer and performs in the
100kHz reference signal which is eighth of the channel step
(12.5kHz). The input signal from the pins 1 and 5 of the PLL
IC is divided down to the 100kHz and compared at phase
comparator. The pulsed output signal of the phase com-
parator is applied to the charge pump and transformed into
DC signal in the loop filter (LPF). The DC signal is applied to
the pin 3 of the VCO and locked to keep the VCO frequency
constant.
PLL data is output from DT (pin 52), CP (pin 64) and EP
(pin 69) of the microprocessor (IC15). The data are input to
the PLL IC when the channel is changed or when transmis-
sion is changed to reception and vice versa. A PLL lock con-
dition is always monitored by the pin 21 (UL) of the micro-
processor. When the PLL is unlocked, the UL goes low.