National Instruments NI 6115/6120 - page 103

Appendix B Common Questions

NI 6115/6120 User Manual B-6 ni.com

Caution If you enable a PFI line for output, do not connect any external signal source toit;

if you do, you can damage the device, the computer, and the connected equipment.

What are the power-on states of the PFI and DIO lines on the

I/Oc onnector?

At system power-on and reset, both the PFI and DIO lines are set to

high-impedance by the hardware. Hence, the device circuitry is not actively

driving the output either high or low. However, these lines may have pull-up

or pull-down resistors connected to them as shown in Table4-5, Digital I/O

Signal Summary. These resistors weakly pull the output to either a

logic-high or logic-low state. For example, DIO(0) is in the

high-impedance state after power on, and Table4-5 shows that there is a

50 kΩ pull-up resistor. This pull-up resistor sets the DIO(0) pin to a logic

high when the output is in a high-impedance state.

AIGATE —ND_IN_EXTERNAL_GATE

WFTRIG AO Star t Trig ger ND_OUT_START_TRIGGER

UPDATE* AO Update ND_OUT_UPDATE

UISOURCE —ND_OUT_UPDATE_CLOCK_TIMEBASE

AOGATE —ND_OUT_EXTERNAL_GATE

Table B-1. Signal Name Equivalencies (Continued)

Hardware

Signal Name

LabVIEW

Route Signal NI-DAQ Select_Signal

Contents

Main Page Important Information Warranty Copyright Trademarks Patents Compliance FCC/Canada Radio Frequency Interference Compliance Determining FCC Class FCC/DOC Warnings Class A Compliance to EU Directives Contents Chapter 4 Connecting Signals Page About This Manual Conventions National Instruments Documentation Related Documentation Introduction About the NI 6115/6120 Using PXI with CompactPCI What You Need to Get Started Software Programming Choices NI-DAQ National Instruments ADE Software Optional Equipment Custom Cabling Unpacking Safety Information Page Installing and Configuring the NI 6115/6120 Installing the Software Installing the Hardware Page Configuring the Device National Instruments Corporation 3-1 NI 6115/6120 User Manual Hardware Overview DAQ - STC RTSI Bus Figure 3-1. NI 6115 Block Diagram Analog Input The following sections describe in detail each AI category. Input Mode Note The inputs are differential only in the sense that the ground loops are broken. I/O Connector Input Polarity and Input Range Considerations for Selecting Input Ranges Input Coupling Analog Output Analog Trigger Figure 3-3. Analog Trigger Block Diagram for the NI6115/6120 Figure 3-4. Below-Low-Level Analog Triggering Mode Page Antialiasing Filters Phase-Locked Loop Circuit Correlated Digital I/O Timing Signal Routing Page Programmable Function Inputs Device and RTSI Clocks RTSI Triggers Page Figure 3-13. PXI RTSI Bus Signal Connections Connecting Signals I/O Connector Figure 4-1. I/O Connector Pin Assignment for the NI6115/6120 I/O Connector Signal Descriptions Table 4-2. Signal Descriptions for I/O Connector Pins Table 4-2. Signal Descriptions for I/O Connector Pins (Continued) Table 4-3. Analog I/O Signal Summary for the NI6115 Table 4-2. Signal Descriptions for I/O Connector Pins (Continued) Table 4-4. Analog I/O Summary for the NI 6120 Table 4-5. Digital I/O Signal Summary Types of Signal Sources Floating Signal Sources Table 4-5. Digital I/O Signal Summary (Continued) Ground-Referenced Signal Sources Connecting Analog Input Signals Connections for Ground-Referenced Signal Sources * Figure 4-2. Pseudodifferential Input Connections on the NI 6115 forGround-Referenced Signals Figure 4-3. Pseudodifferential Input Connections on the NI 6120 forGround-Referenced Signals Connections for Nonreferenced or Floating Signal Sources * Figure 4-4. Differential Input Connections on the NI6115 for Nonreferenced Signals Common-Mode Signal Rejection Considerations Working Voltage Range Connecting Analog Output Signals Connecting Digital I/O Signals Correlating DIO Signal Connections Page Power Connections Connecting Timing Signals Page Programmable Function Input Connections DAQ Timing Connections TRIG1 Signal TRIG2 Signal Page STARTSCAN Signal Page CONVERT* Signal AIGATE Signal SISOURCE Signal SCANCLK Signal EXTSTROBE* Signal Waveform Generation Timing Connections WFTRIG Signal UPDATE* Signal UISOURCE Signal General-Purpose Timing Signal Connections GPCTR0_SOURCE Signal GPCTR0_GATE Signal GPCTR0_OUT Signal GPCTR0_UP_DOWN Signal GPCTR1_SOURCE Signal GPCTR1_GATE Signal GPCTR1_OUT Signal Figure 4-35 shows the timing requirements for GPCTR1_OUT. Figure 4-35. GPCTR1_OUT Signal Timing Figure 4-36. GPCTR Timing Summary GPCTR1_UP_DOWN Signal FREQ_OUT Signal Field Wiring Considerations Calibration Loading Stored Calibration Constants Self-Calibration External Calibration Page A Specifications Analog Input Input Characteristics DC Transfer Characteristics Table A-1. NI 6115 Analog Input DC Accuracy Information Table A-2. NI 6120 Analog Input DC Accuracy Information1 Dynamic Characteristics Table A-3. NI6115 Analog Input Dynamic Characteristics Table A-4. NI6120 Analog Input Dynamic Characteristics Figure A-1. NI6115 Total Harmonic Distortion Plus Noise (THD + N) Figure A-2. NI6120 Total Harmonic Distortion Plus Noise (THD + N) Figure A-3. NI6115 High-Voltage THD + N Figure A-4. NI 6120 High-Voltage THD+ N Figure A-5. NI6115 THD + N with Filters Stability Analog Output Output Characteristics DC Transfer Characteristics Voltage Output Dynamic Characteristics Stability Digital I/O Timing I/O Trig ger s Analog Trigger Page Safety Maximum Working Voltage Electromagnetic Compatibility B Common Questions General Information Installing and Configuring the Device Analog Input and Output Page Timing and Digital I/O Page C Technical Support and Professional Services Page Glossary Numbers/Symbols A B C D E F G H I K L M N O P R S T U V W Index Numerics A B C D E F G H I K L M N O P Q R S Page T U V W