Chapter2 HardwareOverview
©NationalInstruments Corporation 2-5 NIPXI-562x User Manual
Block Diagram
The block diagram below illustrates the operation of the NI 562x.
An explanation ofs ome of thesefeatures follows.
Figure2-3. NI562xBlock Diagram
The digital downconverteris a digital signal processor (DSP) that allows
you to digitally zoom in on data, which reduces the amount of data
transferredinto memory and speeds up the rate of data transfer. The digital
downconverterperforms frequency-translation, filtering, and decimation
aftersignals go through the ADC. Refer to the Incorporating the DDC
section for more information.
ThePLL uses a phase detector to synchronize the acquisition clock to either
a10 MHz reference clock suppli ed through REF CLK IN or to the CLK 10
signalfrom the PXI backplane. You can also leave the acquisition clock in
TIO
(Timingand Control)
Digital
Downconverter
Voltage
Controlled
Oscillator
P
X
I
DataPath
Logic
Onboard
Memory
Filter
MITE
(PXIInterface)
ADC
Dither
+
Analog
Input
(INPUT)
Triggerand
ClockRouting
10MHz
Reference
Input
(REFCLK IN)
EXTTRIG
(PFI)
ExternalTrigger PXITrigger
CLK10
Phase
Detector
CalDAC
PLL