132
µ
PD17062
In , specify the data memory bank containing the contents of the system register.
Because the bank becomes BANK0 when an interrupt is accepted, if the data is saved in BANK0, this
instruction is not necessary.
In , save the contents of the window register in data memory M1.
Because the POKE instruction is used, the address of data memory M1 should be 40H or more. Because
the window register is used as a work area for subsequent data saving, its contents must be saved first.
In , save the interrupt permission flags (IPNC, IPBMT0, and IPVSYN) set when interrupts are accepted.
In this example, all INTNC pin, VSYNC pin, and timer interrupts must be permitted when control is returned to
the main routine in this save operation. The priority of the timer interrupt is higher than that of the INTNC pin.
Therefore, if the timer interrupt is accepted while the INTNC pin interrupt is being processed, control should
be returned with the INTNC pin interrupt inhibited.
In , permit VSYNC interrupt with a lower priority than the timer interrupt. Then, use the EI instruction to
permit all interrupts.
Because processing in , , , and must be executed with an interrupt inhibited, the VSYNC interrupt
with the highest priority is also inhibited during this processing.
In and , save and restore the contents of the system and control registers. At this time, interrupts with
high priorities can be enabled.
If the contents of the registers are saved when a VSYNC interrupt with a high priority is accepted, the contents
of the system and control registers do not change when control is returned from VSYNC interrupt processing.
In and , return the contents of the interrupt permission flag and window register.
At this time, all interrupts should be inhibited.
If a timer interrupt is issued when the instruction in that permits an interrupt is executed in an EI state,
the contents of the window register in are not restored but are saved again in . At this time, the contents
of the window register cannot be restored.