143
µ
PD17062
12.4.2 Correcting the Timer Carry FF at a CE reset
This section describes an example of correcting the timer at a CE reset.
If the timer carry FF is used both to check for power failure and as a timer, it is necessary to correct the
timer at a CE reset, as explained in the following example.
The timer carry FF is reset to 0 at a power-on reset, and it is kept from being set until the BTM0CY flag is
read-accessed using a PEEK instruction.
When the CE pin goes from a low to a high, a CE reset occurs in synchronization with the positive-going
edge of the timer carry FF set pulse. At this point, the BTM0CY flag is set to 1 and becomes active.
Therefore, checking the state of the BTM0CY flag at a system reset (power-on reset or CE reset) can
discriminate between a power-on reset and CE reset; if the flag is 0, it indicates a power-on reset, and if 1,
it indicates a CE reset (power failure check).
A timer for ordinary time measurement must continue to operate even at a CE-reset.
Reading the BTM0CY flag for a power failure check could reset the BTM0CY flag to 0, thus losing a chance
of detecting a set (1) state of the flag.
To skirt the above problem, it is necessary to update the timer for time measurement at a CE reset that occurs
because of power failure.
See also Section 14.6 for details about a power failure check.
Example Correcting the timer at a CE reset
When using the timer carry FF for a power failure check and clock update
START: ; Program address 0000H
Process A
;
SKT1 BTM0CY ; Built-in macro
; Tests the BTM0CY flag.
BR INITIAL ; Branches to INITIAL if 0 (power failure check)
BACKUP:
;
Update the clock by 100 ms
; Correct the clock because of a backup (CE reset).
LOOP:
;
Process B ; While performing process B,
SKF1 BTM0CY ; tests the BTM0CY flag and updates the clock.
BR BACKUP
BR LOOP
INITIAL:
INITFLG NOT BTM0ZX, NOT BTM0CK2, NOT BTM0CK1, NOT BTM0CK0
; Built-in macro
; Because a power failure (power-on reset) is detected, the timer
; carry FF setting time interval is set to 100 ms, and passes
; control to process C.
Process C
BR LOOP
Fig. 12-6 shows the timing chart for the above program.