CHAPTER 3 CPU ARCHITECTURE
User’s Manual U15331EJ4V1UD 49
Figure 3-2. Memory Map (
µ
PD78F9488)
8 0 0 0 H
7 F F F H
Special function registers
256 × 8 bits
Internal high-speed RAM
1024 × 8 bits
LCD display RAM
28 × 4 bits
F F F F H
F F 0 0 H
F E F F H
F B 0 0 H
F A F F H
0 0 0 0 H
Program memory
space
Data memory
space 7 F F F H
0 0 0 0 H
Program area
0 0 8 0 H
0 0 7 F H
Program area
0 0 4 0 H
0 0 3 F H
CALLT table area
Reserved
0 0 2 E H
0 0 2 D H Vector table area
Flash memory
32768 × 8 bits
F A 1 C H
F A 1 B H
F A 0 0 H
F 9 F F H Reserved