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QSCLP-100
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32 pages, 843.21 Kb
QSCLP-100
User's Manual
Revision
1.00
January 2002
P/N:
940-01
80
-100
Contents
Main
1General Information
2Hardware Configuration
2.1Factory Default Configuration
2.2Enable Scratchpad Register (SPAD, J2)
2.3Force High-Speed UART Clock (X2, X4, or X8, J3-J5)
Page
3Hardware Installation
Page
4Address Map and Special Registers
4.1Base Address and Interrupt Level (IRQ)
4.2Enabling the Special Registers
4.3Interrupt Status Register
4.4Options Register
4.4.1Enhanced Serial Adapter Identification
4.4.2Clock Rate Multiplier
5Windows Configurations
5.1Windows Millennium
5.2Windows 2000
Page
5.4Windows 95 5.5Using the "New Hardware Found" Wizard
5.6Viewing Resources with Device Manager
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Page
Page
6Other Operating Systems
6.1Windows NT
6.2OS/2
6.3DOS and other operating systems
6.3.1QTPCI.EXE
Page
Page
7 External Connections
Page
Page
10 Troubleshooting
Page
Declaration of Conformity
10 Troubleshooting
2 Hardware Configuration
3 Hardware Installation
4 Address Map and Special Registers
5 Windows Configurations
Page
8PCI Resource Map
9Specifications