4513/4514 Group User’s Manual
HARDWARE
1-17
FUNCTION BLOCK OPERATIONS
FUNCTION BLOCK OPERATIONS
CPU
(1) Arithmetic logic unit (ALU)
The arithmetic logic unit ALU performs 4-bit arithmetic such as 4-
bit data addition, comparison, AND operation, OR operation, and
bit manipulation.
(2) Register A and carry flag
Register A is a 4-bit register used for arithmetic, transfer, ex-
change, and I/O operation.
Carry flag CY is a 1-bit flag that is set to “1” when there is a carry
with the AMC instruction (Figure 1).
It is unchanged with both A n instruction and AM instruction. The
value of A0 is stored in carry flag CY with the RAR instruction (Fig-
ure 2).
Carry flag CY can be set to “1” with the SC instruction and cleared
to “0” with the RC instruction.
(3) Registers B and E
Register B is a 4-bit register used for temporary storage of 4-bit
data, and for 8-bit data transfer together with register A.
Register E is an 8-bit register. It can be used for 8-bit data transfer
with register B used as the high-order 4 bits and register A as the
low-order 4 bits (Figure 3).
(4) Register D
Register D is a 3-bit register.
It is used to store a 7-bit ROM address together with register A and
is used as a pointer within the specified page when the TABP p,
BLA p, or BMLA p instruction is executed (Figure 4).
Fig. 1 AMC instruction execution example
Fig. 2 RAR instruction execution example
Fig. 3 Registers A, B and register E
Fig. 4 TABP p instruction execution example
(CY)
(M(DP))
(A)
Addition ALU
<Carry>
<Result>
CY A3A2A1A0
A0CY A3A2A1
<Rotation>
RAR instruction
<Set>
SC instruction <Clear>
RC instruction
A3A2A1A0B3B2B1B0
E7E6E5E4E3E2E1E0
A3A2A1A0
B3B2B1B0
TAB instruction
TEAB instruction
TABE instruction
TBA instruction
Register B Register A
Register B Register A
Register E
Specifying address
TABP p instruction
p6p5p4p3p2p1p0
PCH
DR2DR1DR0A3A2A1A0
PCL
Immediate field
value p The contents of
register D
ROM
840
Middle-order 4 bits
Low-order 4bits
Register A (4)
Register B (4)
The contents of
register A