Renesas 4513, 4514

4513/4514 Group User’s Manual

HARDWARE

1-19

FUNCTION BLOCK OPERATIONS

(8) Program counter (PC)

Program counter (PC) is used to specify a ROM address (page and

address). It determines a sequence in which instructions stored in

ROM are read. It is a binary counter that increments the number of

instruction bytes each time an instruction is executed. However,

the value changes to a specified address when branch instructions,

subroutine call instructions, return instructions, or the table refer-

ence instruction (TABP p) is executed.

Program counter consists of PCH (most significant bit to bit 7)

which specifies to a ROM page and PCL (bits 6 to 0) which speci-

fies an address within a page. After it reaches the last address

(address 127) of a page, it specifies address 0 of the next page

(Figure 7).

Make sure that the PCH does not specify after the last page of the

built-in ROM.

(9) Data pointer (DP)

Data pointer (DP) is used to specify a RAM address and consists

of registers Z, X, and Y. Register Z specifies a RAM file group, reg-

ister X specifies a file, and register Y specifies a RAM digit (Figure

8).

When using port D, set the port D bit position to register Y certainly

and execute the SD, RD, or SZD instruction (Figure 9).

Fig. 7 Program counter (PC) structure

Fig. 8 Data pointer (DP) structure

Fig. 9 SD instruction execution example

Z1Z0X3X2X1X0Y3Y2Y1Y0

Data pointer (DP)

RAM digit

Specifying RAM file

Specifying RAM file group

0101 1

Set

Specifying bit position

Port D output latch

D5D6D4D0

p5p4p3p2p1p0a6a5a4a3a2a1a0

Program counter

PCH

Specifying page PCL

Specifying address