Renesas M16C/26A 9.2. Application Headers

J4
Pin Circuit Net Name Device
Pin
Pin Circuit Net Name Device Pin
1 IO_7 37 2 IO_6 38
3 IO_5 39 4 TRISTn/IO_4* 40
5 AD3 41 6 AD2 42
7 AD1 43 8 R_AVSS 44
9 AD0 45 10 R_VREF 46
11 R_AVCC 47 12 IO_3* 48
Table 9-4: J4
9.2. Application Headers
Table 9-5 and Table 9-6 below show the standard application header connections.
JA1
Pin Header Name Circuit Net
Name
Device
Pin
Pin Header Name Circuit Net
Name
Device
Pin
1 Regulated Supply 1 CON_5V - 2 Regulated Supply 1 Ground -
3 Regulated Supply 2 CON_3V3 - 4 Regulated Supply 2 Ground -
5 Analogue Supply CON_AVCC 47 6 Analogue Supply CON_AVSS 44
7 Analogue Reference CON_VREF 46 8 ADTRG ADTRG* 36
9 ADC0 AD0 45 10 ADC1 AD1 43
11 ADC2 AD2 42 12 ADC3 AD3 41
13 DAC0 NC - 14 DAC1 NC -
15 IOPort0 IO_0* 3 16 IOPort1 IO_1* 2
17 IOPort2 IO_2 1 18 IOPort3 IO_3* 48
19 IOPort4 IO_4* 40 20 IOPort5 IO_5 39
21 IOPort8 IO_6 38 22 IOPort7 IO_7 37
23 IRQ3 IRQ3* 34 24 NC NC -
25 I²C Bus IIC_SDA* 25 26 I²C Bus IIC_SCL* 24
Table 9-5: JA1 Standard Generic Header
17