Renesas REJ06B0732-0100 - page 2

SH7211 Group

Data Transfer between On-chip RAM Areas with DMAC (Cycle-Stealing Mode)

REJ06B0732-0100/Rev.1.00 March 2008 Page 2 of 13

1. Introduction

1.1 Specification

• DMAC channel 0 is used.

• Auto-request mode is used as the interrupt source for activating DMA transfer.

• Cycle-stealing mode is used as the bus mode.

1.2 Used Module

• Direct memory access controller (DMAC channel 0)

1.3 Applicable Conditions

• Microcontroller: SH7211

• Operating Frequency: Internal clock 160 MHz

Bus clock 40 MHz

Peripheral clock 40 MHz

• C Compiler: SuperH RISC engine family C/C++ compiler package Ver.9.01,

from Renesas Technology

Contents

Main APPLICATION NOTE SH7211 Group Page SH7211 Group 2. Description of Sample Application 2.1 Operation of Modules Used Page Data Transfer between On-chip RAM Areas with DMAC (Cycle-Stealing Mode) REJ06B0732-0100/Rev.1.00 March 2008 Page 5 of 13 Figure 3 Block Diagram of DMAC SH7211 Group 2.2 Operational Description of Sample Program SH7211 Group 2.3 Procedure for Setting Modules REJ06B0732-0100/Rev.1.00 March 2008 Page 8 of 13 Figure 6 Flowchart of Initializing DMAC SH7211 Group 2.4 Register Settings for Sample Program 2.4.1 Clock Pulse Generator (CPG) 2.4.2 Standby Control Register 2.4.3 Direct Memory Access Controller (DMAC) Page SH7211 Group Website and Support Revision Record REJ06B0732-0100/Rev.1.00 March 2008 Page 13 of 13 Notes regarding these materials 2008. Renesas Technology Corp., All rights reserved.