Renesas SH7147 Table 3 Setting a Switch (SW1) , Figure 3 shows a circuit for masking signals on the user system interface board. , Figure 3 Circuit for Masking Signals Note: The UPVcc is the PVcc in the user system.

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Table 3 Setting a Switch (SW1)
Switch Setting
SW1
No.
PLQP0100KB-A
(Former Code:
FP-100UV)
Socket Pin No.
Signal Name
On
Off
1 58 PA9/_WAIT/TCLKD/_POE8/TXD2 Mask canceled Mask enabled
2 47 PB1/_BREQ/TIC5W/HRXD1 Mask canceled Mask enabled
3 42 PB6/_WAIT/HTXD0 Mask canceled Mask enabled
4 41 PB7/_CS1/HRXD0 Mask canceled Mask enabled
5 18 PE10/_CS0/TIOC3C Mask canceled Mask enabled
6 8 PE16/_WAIT/TIOC3BS Mask canceled Mask enabled
7 7 PE17/_CS0/TIOC3DS Mask canceled Mask enabled
8 6 PE18/_CS1/TIOC4AS Mask canceled Mask enabled
Figure 3 shows a circuit for masking signals on the user system interface board.
UPVCC
PB7
PB1
PB6
PA9
SW1
PE10_C
PB7_C
PB1_C
PB6_C
PA9_C
PE10
PE16
PE17
PE18 PE18_C
PE17_C
PE16_C
User system Emulator
Figure 3 Circuit for Masking Signals
Note: The UPVcc is the PVcc in the user system.