Renesas HD6417641, SH7641 - page 24

Rev. 4.00 Sep. 14, 2005 Page xxiv of l
20.4.4 EP1 Bulk-OUT Transfer (Dual FIFOs)................................................................ 774
20.4.5 EP2 Bulk-IN Transfer (Dual FIFOs).................................................................... 776
20.4.6 EP3 Interrupt-IN Transfer.....................................................................................778
20.5 Processing of USB Standard Commands and Class/Vendor Commands.......................... 779
20.5.1 Processing of Commands Transmitted by Control Transfer.................................779
20.6 Stall Operations..................................................................................................................780
20.6.1 Forcible Stall by Application................................................................................ 780
20.6.2 Automatic Stall by USB Function Module........................................................... 782
20.7 DMA Transfer....................................................................................................................784
20.7.1 DMA Transfer for Endpoint 1.............................................................................. 784
20.7.2 DMA Transfer for Endpoint 2.............................................................................. 785
20.8 Example of USB External Circuitry.................................................................................. 786
20.9 USB Bus Power Control Method.......................................................................................789
20.9.1 USB Bus Power Control Operation...................................................................... 789
20.9.2 Usage Example of USB Bus Power Control Method........................................... 790
20.10 Notes on Usage..................................................................................................................794
20.10.1 Receiving Setup Data........................................................................................... 794
20.10.2 Clearing FIFO.......................................................................................................794
20.10.3 Overreading or Overwriting Data Register........................................................... 794
20.10.4 Assigning Interrupt Source for EP0......................................................................795
20.10.5 Clearing FIFO when Setting DMA Transfer........................................................ 795
20.10.6 Manual Reset for DMA Transfer..........................................................................795
20.10.7 USB Clock............................................................................................................ 795
20.10.8 Using TR Interrupt................................................................................................795
Section 21 A/D Converter................................................................................. 797
21.1 Features..............................................................................................................................797
21.1.1 Block Diagram......................................................................................................798
21.1.2 Input Pins.............................................................................................................. 799
21.1.3 Register Configuration..........................................................................................800
21.2 Register Descriptions......................................................................................................... 800
21.2.1 A/D Data Registers A to D (ADDRA0 to ADDRD0, ADDRA1 to ADDRD1)...800
21.2.2 A/D Control/Status Registers (ADCSR0, ADCSR1)............................................801
21.2.3 A/D0, A/D1 Control Register (ADCR)................................................................ 804
21.3 Operation........................................................................................................................... 805
21.3.1 Single Mode..........................................................................................................805
21.3.2 Multi Mode........................................................................................................... 806
21.3.3 Scan Mode............................................................................................................ 808
21.3.4 Simultaneous Sampling Operation....................................................................... 809
21.3.5 A/D Converter Activation by MTU...................................................................... 810