Rev. 5.00, 09/03, page 439 of 760
Bit 2—Transmit-End Interrupt Enable (TEIE): Enables or disa bles the transmit-end interrupt
(TEI) requested if SCTDR does not contain new transmit data when the MSB is transmitted.
Bit 2: TEIE Description
0 Transmit- end interr upt (TEI) req u ests are disabled*(Initial value)
1 Transmit-end interrupt (TEI) requests are enabled*
Note: *The TEI request can be cleared by read ing the TD RE bit in the serial statu s regist er
(SCSSR) after it has been set to 1, then clearing TDRE to 0 and clearing the transmit end
(TEND) bit to 0, or by clearing the TEIE bit to 0.
Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): Select the SCI clock source and enable or
disable cl ock output from the SCK pin . Depending on the combination of CKE1 and CKE 0, the
SCK pin can be u s ed for serial clock output or serial clock in put.
The CKE0 setting is valid only in asynchronous mode, and only when the SCI is internally
clocked (CKE1 = 0). The CKE0 setting is i gn ored in synchronous m ode, or wh en an external
clock source is selected (CKE1 = 1) . Before selecting the SCI op e rating mode in the serial mode
register (SCSMR), set CKE1 and CKE 0. For further details on selection of the SCI clock source,
see table 14.10 in s ect i on 14.3, Operation .
Bit 1:
CKE1 Bit 0:
CKE0 Description
0 0 Asynchronous mode Internal clock, SCK pin used for input pin (input signal
is ignored) (Initial value)
Synchronous mod e Internal clock, SCK pin used for synchron ous cl oc k
output (Initial value)
1 Asynchronous mode Internal clock, SCK pin used for clock output*1
Synchronous mod e Internal clock, SCK pin used for synchron ous cl oc k
output
1 0 Asynchronous mode Ex ternal clock, SCK pin used for clock input*2
Synchronous mod e External clock, SCK pin used for sync hron ous cl oc k
input
1 Asynchronou s mode Ex ternal clo ck, SCK pin used for cloc k input *2
Synchronous mod e External clock, SCK pin used for sync hron ous cl oc k
input
Not es: 1. The output cl ock frequency is t he sa me as the bit rate.
2. The input clock frequency is 16 times the bit rate.