No. Signal Name Alternative
Reset Function I/O
(Reset) Pull- PIN
No. Comment
EMIF (External Memory Interface)
109 WR_N O (O) A4 Write strobe
110 RD_N O (O) B5 Read strobe
111 CS_PER0_N O (O) D5 Chip Select Bank 1 (ROM);
boot area
112 CS_PER1_N O (O) A5 Chip select bank 2
113 CS_PER2_N O (O) A6 Chip select bank 3
114 CS_PER3_N O (O) B6 Chip select bank 4
115 BE0_DQM0_N O (O) N4 Byte enable 0 for D(7:0)
116 BE1_DQM1_N O (O) V1 Byte enable 1 for D(15:8)
117 BE2_DQM2_N O (O) J4 Byte enable 2 for D(23:16)
118 BE3_DQM3_N O (O) P5 Byte enable 3 for D(31:24)
119 RDY_PER_N I (I) up D7 Ready signal
120 CLK_SDRAM B (O) M1 Clock for SDRAM
121 CS_SDRAM_N O (O) L1 Chip-Select for SDR AM
122 RAS_SDRAM_N O (O) M5 RAS for SDRAM
123 CAS_SDRAM_N O (O) L2 CAS for SDRAM
124 WE_SDRAM_N O (O) M4 Write Enable for SDRAM
1.5.7 LBU, MII Interface or ETM Trace Interface
No. Function 1
LBU
Config
(6,5,2)=xx0b
Function 2
PHY Debug
and
GPIO[44:32]
Config
(6,5,2)=011b
Function 3
ETM Trace
and
GPIO[44:32]
Config
(6,5,2)=101b
Function 4
Reserved
[6,5,2]=111b
IO
(Reset
See
Config
[6,5,2])
Pull
- PIN
No. Comment
LBU / MII Interface/ ETM Trace Interface
125 LBU_A0 RXD_P10 ETMEXTOUT I/O/O/I
(ETM : I) up AB3 LBU or MII or ETM
126 LBU_A1 RXD_P11 ETMEXTIN1 I/O/I/I
(ETM : I) up AA4 LBU or MII or ETM
127 LBU_A2 RXD_P12 TRACEPKT7 I/O/O/I
(ETM : I) up AA5 LBU or MII or ETM
128 LBU_A3 RXD_P13 TRACEPKT6 I/O/O/I
(ETM : I) up AB5 LBU or MII or ETM
129 LBU_A4 CRS_P1 TRACEPKT5 I/O/O/I
(ETM : I) up AA6 LBU or MII or ETM
130 LBU_A5 RX_ER_P1 TRACEPKT4 I/O/O/I
(ETM : I) up AB6 LBU or MII or ETM
131 LBU_A6 RX_DV_P1 TRACEPKT3 I/O/O/I
(ETM : I) up AA7 LBU or MII or ETM
132 LBU_A7 COL_P1 TRACEPKT2 I/O/O/I
(ETM : I) up AB7 LBU or MII or ETM
133 LBU_A8 RXD_P20 TRACEPKT1 I/O/O/I
(ETM : I) up AA8 LBU or MII or ETM
134 LBU_A9 RXD_P21 TRACEPKT0 I/O/O/I
(ETM : I) up AB8 LBU or MII or ETM
135 LBU_A10 RXD_P22 TRACESYNC I/O/O/I
(ETM : I) up AA9 LBU or MII or ETM
136 LBU_A11 RXD_P23 PIPESTA2 I/O/O/I
(ETM : I) up AA10 LBU or MII or ETM
137 LBU_A12 CRS_P2 PIPESTA1 I/O/O/I
(ETM : I) up AB10 LBU or MII or ETM
138 LBU_A13 RX_ER_P2 PIPESTA0 I/O/O/I
(ETM : I) up AA11 LBU or MII or ETM
139 LBU_A14 RX_DV_P2 I/O/I/I
up AB11 LBU or MII
140 LBU_A15 COL_P2 I/O/I/I
up W11 LBU or MII
Copyright © Siemens AG 2007. All rights reserved. 16 ERTEC 200 Manual
Technical data subject to change Version 1.1.0