Device Control Register | Silicon Image SSD-H16G(I)-3500 manual

ATA REGISTERS

SSD-HXXX(I)-3500 DATA SHEET

DEVICE CONTROL REGISTER

The Device Control register is used to control the interrupt request and issue ATA software resets.

Table 28: Device Control Register

Operation	D7	D6	D5	D4	D3	D2	D1	D0
Write	-	-	-	-	1	SRST	nIEN	0

Bit(s) Description

7-4 Reserved bits.

3 Always set to 1.

2 Software Reset (SRST). When set, resets the ATA software.

1Interrupt Enable (nIEN). When set, device interrupts are disabled. There is no function in the memory-mapped mode.

0 Always set to 0.

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3500H-03DSR

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FEBRUARY 2, 2009

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Silicon Image SSD-H16G(I)-3500 manual Device Control Register, Operation Write, NIEN Bits Description

Contents

Overview Features Added UpdatedRevision History Document No Release Date Changes Table of Contents SSD-HXXXI-3500 Data Sheet Related Documentation Sales and Support Part Numbering List of Figures List of Tables Idle Immediate 95h, E1h Part Numbering Nomenclature Physical Dimensions Physical Specifications Pin Locations System Performance Product SpecificationsSystem Power Requirements Operational Life Span SiliconDrive Part# Capacity Service Life GB Written per DayReliability Product Capacity Number Bytes Sectors Cylinders Heads Track Product Capacity SpecificationsEnvironmental Specifications Pin Electrical SpecificationPin Assignments Disk Active/Slave Present. This open Signal DescriptionsSignal Name Pins Type Description Data Inputs/Outputs. This is the 8-bit or Interrupt Request. This signal is an active DMA Request. This signal is used for DMAController by -IORD and -IOWR. This signal Ground. The device ground signal Absolute Maximum Ratings Device Power Supply. The device powerSymbol Parameter Minimum Maximum Units Symbol Parameter Maximum Units Symbol Parameter 5V ±10% Units Minimum Maximum DC Characteristics O Access Read Timing Access Read Timing O Access Write Timing Access Write Timing True IDE Read/Write Access Timing True IDE Read/Write Access Timing True IDE Multiword DMA Read/Write Access Timing True IDE Multiword DMA Read/Write Access Timing CS0# CS1# DA02 DA01 DA00 Task File Register SpecificationATA and True IDE Register Decoding ATA Registers Error Register Byte Feature RegisterOperation Read/Write Sector Count Register Read/Write Sector Count Default Value Logical Block Number bits A07-A00 LBA Addressing Sector Number RegisterRead/Write Logical Block Number bits A15-A08 LBA Addressing Cylinder Low RegisterLow Logical Block Number bits A23-A16 LBA Addressing Cylinder High Register LBA27 LBA26 LBA25 LBA24 Drive/Head Register Corrected Data CORR. Always set to Drive Write Fault DWF. Always set toStatus Register Operation Read/Write ATA Command Code Command Register Alternate Status Register NIEN Bits Description Device Control RegisterOperation Write Device Address Register Read/Write NWTG NHS3 NHS2 NHS1 NHS0 NDS1 NDS0 Default Value Class Command Name Registers Used Code ATA Command Block and SET DescriptionATA Command Block and Set Description ATA Command Set ATA Command Set Register Check Power Mode 98h, E5hCheck Power Mode 98h, E5h Executive Drive Diagnostic 90h Executive Drive Diagnostic 90h Format Track 50h Drive Head Number LBA27-24 Command 50hFormat Track 50h Identify Drive ECh Identify Drive ECh Identify Drive Drive Attribute Data Word Data Default Bytes Data Description Address Identify Drive Drive Attribute Data Identify Drive Drive Attribute Data Idle 97h, E3h Idle 97h, E3h Idle Immediate 95h, E1h Idle Immediate 95h, E1h Initialize Drive Parameters 91h Initialize Drive Parameters 91h Recalibrate 1Xh Drive Command 1XhRecalibrate 1Xh Read Buffer E4h Read Buffer E4h Read DMA C8h Drive Head Number LBA27-24 Command C8hRead DMA C8h Read Multiple C4h Drive Head Number LBA27-24 Command C4hRead Multiple C4h Read Sector 20h, 21h Drive Head Number LBA27-24 Command 20h or 21hRead Sector 20h, 21h Read Long Sectors 22h, 23h Drive Head Number LBA27-24 Command 22h or 23hRead Long Sectors 22h, 23h Read Verify Sectors 40h, 41h Drive Head Number LBA27-24 Command 40h or 41hRead Verify Sectors 40h, 41h Seek 7Xh Drive Head Number LBA27-24 Command 7XhSeek 7Xh Feature Operation Set Features EFhSet Features EFh Set Features’ Attributes Set Multiple Mode C6h Set Multiple Mode C6h Set Sleep Mode 99h, E6h Set Sleep Mode 99h, E6h Standby 96h, E2h Standby 96h, E2h Standby Immediate 94h, E0h Standby Immediate 94h, E0h Write Buffer E8h Write Buffer E8h Write DMA CAh Drive Head NumberLBA27-24 Command CAhWrite DMA CAh Write Multiple C5h Drive Head NumberLBA27-24 Command C5hWrite Multiple C5h Write Sectors 30h, 31h Drive Head Number LBA27-24 Command 30h or 31hWrite Sectors 30h, 31h Write Long Sectors 32h, 33h Drive Head Number LBA27-24 Command 32h or 33hWrite Long Sectors 32h, 33h Erase Sectors C0h Drive Head Number LBA27-24 Command C0hErase Sectors C0h Request Sense 03h Extended Error CodesExtended Error Codes Description Request Sense 03h Translate Sector 87h Drive Head Number LBA27-24 Command 87hTranslate Sector 87h Wear-Level F5h Wear-Level F5h Write Multiple w/o Erase CDh Drive Head Number LBA27-24 Command CDhWrite Multiple w/o Erase CDh Write Sectors w/o Erase 38h Drive Head Number LBA27-24 Command 38hWrite Sectors w/o Erase 38h Write Verify 3Ch Drive Head Number LBA27-24 Command 3ChWrite Verify 3Ch 3500 Sales and SupportPart Numbering Part Numbering Nomenclature Part Number Capacity Part Numbers Related Documentation Related Documentation

Silicon Image SSD-H16G(I)-3500 Device Control Register, Operation Write, NIEN Bits Description

Models: SSD-H16G(I)-3500

SSD-HXXX(I)-3500 DATA SHEET

Table 28: Device Control Register

Operation

Write

SRST

nIEN

Bit(s) Description

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