Ultra Fast USB 2.0 SD/MMC Flash Media Controller
Datasheet
Chapter 2 Block Diagram
USB
HostPHY SIE CTL
BUS
INTFC
AUTO_
CBW
PROC
BUS FMDU INTFC CTL
FMI
SD/ |
|
| Media |
MMC |
|
| Interface |
|
|
|
|
PLL 1.8V Reg
RAM 10KB
ROM 64KB
Clock
Generation and
Control
XDATA BRIDGE + BUS ARBITER
ADDR | Program | |
Memory | ||
MAP | ||
I/O Bus | ||
| ||
|
|
8051 PROCESSOR
EP0 TX
EP0 RX
BUS RAM INTFC
EP1 RX
EP1 TX
EP2 RX
EP2 TX
SFR
RAM
4K
total
PWR_FET1 |
|
|
|
|
|
|
| GPIO10(CARD_PWR) | |
GPIOs |
|
| 7 pins | |
|
|
|
|
|
Figure 2.1 USB2244/USB2244i Block Diagram
SMSC USB2244/USB2244i | 7 | Revision 1.0 |
DATASHEET