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SMSC USB2514 4.7.2.3RESET_N for SMBus Slave Configuration, 4.7.3USB Bus Reset, MIN, TYP, MAX, NAME, UNITS, Note:, Notes:, DESCRIPTION

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USB 2.0 High-Speed 4-Port Hub Controller

Datasheet

4.7.2.3RESET_N for SMBus Slave Configuration

	Hardware				Attach			Start
		Reset	SMBus Code	Hub PHY		USB Reset		completion
	reset				USB		Idle
		Negation	Load	Stabilization		recovery		request
	asserted				Upstream
								response

t1 t2 t3 t4 t5 t6 t7

RESET_N

VSS

Figure 4.6 Reset_N Timing for SMBus ModeTable 4.7 Reset_N Timing for SMBus Mode

NAME	DESCRIPTION	MIN	TYP	MAX	UNITS

t1	RESET_N Asserted.	1			μsec

t2	Hub Recovery/Stabilization.			500	μsec

t3	SMBus Code Load (See Note).		250	300	msec

t4	Hub Configuration and USB Attach.			100	msec

t5	Host acknowledges attach and signals USB	100			msec
	Reset.

t6	USB Idle.		Undefined		msec

t7	Completion time for requests (with or without data			5	msec
	stage).

Notes:

For Bus-Powered configurations, the 99.5ms (MAX) is required, and the Hub and its associated circuitry must not consume more than 100mA from the upstream USB power source during t2+t3+t4+t5+t6+t7. For Self-Powered configurations, t3 MAX is not applicable and the time to load the configuration is determined by the external SMBus host.

All Power Supplies must have reached the operating levels mandated in Chapter 5, DC Parameters, prior to (or coincident with) the assertion of RESET_N.

4.7.3USB Bus Reset

In response to the upstream port signaling a reset to the Hub, the Hub does the following:

Note: The Hub does not propagate the upstream USB reset to downstream devices.

1.Sets default address to 0.

2.Sets configuration to: Unconfigured.

3.Negates PRTPWR[4:1] to all downstream ports.

4.Clears all TT buffers.

SMSC USB2514	41	Revision 1.98 (11-19-07)
	DATASHEET

Contents

USB2514 USB 2.0 High-Speed 4-Port Hub Controller PRODUCT FEATURES General Description ORDER NUMBERS: Table of Contents Chapter List of Figures List of Tables Chapter 1 Pin Configuration Figure 1.2 USB2514 48-PinQFN Chapter 2 Block Diagram PLL Bus-Power Upstream Detect/VBUS Chapter 3 Pin Descriptions 3.1PIN Descriptions Table 3.1 USB2514 Pin Descriptions (continued) Note: SERIAL PORT INTERFACE MISC Page Table 3.2 SMBus or EEPROM Interface Behavior CFG_SEL2 CFG_SEL1 CFG_SEL0 SMBUS OR EEPROM INTERFACE BEHAVIOR 3.2Buffer Type Descriptions Table 3.4 USB2514 Buffer Type Descriptions (continued) Chapter 4 Configuration Options 4.14-PortHub 4.1.1Hub Configuration Options 4.1.1.1Power Switching Polarity 4.1.2VBus Detect 4.3EEPROM Interface 4.3.1Internal Register Set (Common to EEPROM and SMBus) 4.3.1.1Register 00h: Vendor ID (LSB) 4.3.1.2Register 01h: Vendor ID (MSB) Register 02h: Product ID (LSB) 4.3.1.4Register 03h: Product ID (MSB) 4.3.1.5Register 04h: Device ID (LSB) 4.3.1.6Register 05h: Device ID (MSB) 4.3.1.7Register 06h: CONFIG_BYTE_1 4.3.1.8Register 07h: Configuration Data Byte 4.3.1.9Register 08h: Configuration Data Byte 4.3.1.10Register 09h: Non-RemovableDevice 4.3.1.11Register 0Ah: Port Disable For Self Powered Operation 4.3.1.12Register 0Bh: Port Disable For Bus Powered Operation 4.3.1.13Register 0Ch: Max Power For Self Powered Operation 4.3.1.14Register 0Dh: Max Power For Bus Powered Operation 4.3.1.15Register 0Eh: Hub Controller Max Current For Self Powered Operation 4.3.1.16Register 0Fh: Hub Controller Max Current For Bus Powered Operation 4.3.1.17Register 10h: Power-OnTime 4.3.1.18Register 11h: Language ID High 4.3.1.19Register 12h: Language ID Low 4.3.1.20Register 13h: Manufacturer String Length 4.3.1.21Register 14h: Product String Length 4.3.1.22Register 15h: Serial String Length 4.3.1.23Register 16h-53h:Manufacturer String 4.3.1.24Register 54h-91h:Product String Register 92h-CFh:Serial String 4.3.1.26Register F6h: Boost_Up 4.3.1.27Register F8h: Boost_4:0 Register FAh: Port Swap 4.3.1.29Register FBh: Port Remap 4.3.1.30Register FCh: Port Remap Table 4.4 Port Remap Register for Ports 3 & 4.3.1.31Register FFh: Status/Command 4.3.2 I2C EEPROM 4.3.2.1Implementation Characteristics 4.3.2.2Pull-UpResistor 4.3.2.3I2C EEPROM Slave Address 4.3.3In-CircuitEEPROM Programming 4.4SMBus Slave Interface 4.4.1Bus Protocols 4.4.1.1Block Read/Write Slave Address Register Address 4.4.2Invalid Protocol Response Behavior 4.4.3General Call Address Response 4.4.4Slave Device Time-Out 4.4.5Stretching the SCLK Signal 4.4.6SMBus Timing 4.5Default Configuration Option: 4.6Default Strapping Options: 4.7Reset 4.7.1Internal POR Hardware Reset 4.7.2External Hardware RESET_N 4.7.2.1RESET_N for Strapping Option Configuration 4.7.2.2RESET_N for EEPROM Configuration 4.7.2.3RESET_N for SMBus Slave Configuration 4.7.3USB Bus Reset Page Chapter 5 DC Parameters 5.1Maximum Guaranteed Ratings 5.2Recommended Operating Conditions Table DC Electrical Characteristics I, IS Type Input Buffer Input Buffer with Pull-Up (IPU) Table 5.1 DC Electrical Characteristics (continued) IO-U Note CAPACITANCE TA = 25°C; fc = 1MHz; VDD18, VDDPLL Chapter 6 AC Specifications 6.1Oscillator/Clock 6.1.1SMBus Interface: 6.1.2I2C EEPROM: 6.1.3USB Chapter 7 Package Outlines Figure 7.2 48-PinQFN, 7x7mm Body, 0.5mm Pitch