Appendix E: Performance Verification
A–32 VX4801 Programmable Digital I/O Module
d. Set the Slave to initialize byte 2 with an Output Data value of 01 (asserts
RFD to the VX4801) and verify that the VX4801 correspondingly
asserts DAV:
(Observe: VX4801 DAV light on)
e. Set the Slave to input bytes 1 and 3 and verify receipt of DAV (byte 1
bit 1 = 1) and data (byte 3 = 55):
(Observe: 0155 return value)
3. Using the following steps, verify a data byte transfer (AA hex) from the
Slave (byte 5) to the VX4801 (byte 3) using the Data Ready (DRD) and Data
Acknowledge (DAK) handshake lines:
a. Set the Slave mode for byte 2 and 3 to be active high outputs, with
byte 3 initialized to a Load Output data value of AA, and set all tri-states
to be inactive:
b. Set the VX4801 for a positive edge handshake, to update the output date
on receipt of a DRD strobe, to update the input data on receipt of a DRD
strobe, and for byte 5 to be an active high input with its tri-state inactive
(note that after the data is strobed in with DRD from the slave, the
VX4801 will in turn generate the DAK, but only after the controller has
read the data byte):
r;p*+;urd;m5ih;t5i
c. Send a byte 5 input command to the VX4801, and verify that a response
of N, indicating that the module is waiting for a DRD strobe:
(Observe N; waiting for DRD strobe)
d. Set the Slave to send a DRD strobe (byte 2, bit 2) and then verify that
the VX4801 DAK light is off:
(Send DRD to VX4801; observe DAK light off)