Freescale Semiconductor MC68HC08KH12 manual USB HUB Downstream Port Control Registers, 121

EOF2 is generated by KH12 every millisecond, if SOF is not detected when three or more EOF2 has occurred, software can set the SUSPND-bit and put KH12 into suspend mode.

D0+/D0– — Root Port Differential Data

These read only bits are the differential data shown on the HUB root ports. When the bit SUSPND is 0, the data is the latched state at the last EOF2 sample point. When the bit SUSPND is 1, the data reflects the current state on the data line while accessing this register.

9.4.2 USB HUB Downstream Port Control Register (HDP1CR-HDP4CR)

Address:

Read:

Write:

Reset:

$0051
Bit 7	6	5	4	3	2	1	Bit 0
PEN1	LOWSP1	RST1	RESUM1	SUSP1	0	D1+	D1–
0	0	0	0	0	0	X	X

↓ ↓

Address:

Read:

Write:

Reset:

$0054

PEN4	LOWSP4	RST4	RESUM4	SUSP4	0	D4+	D4–
0	0	0	0	0	0	X	X
	= Unimplemented			X = Indeterminate

Figure 9-3. USB HUB Downstream Port Control Registers

(HDP1CR-HDP4CR)

PEN1-PEN4 — Downstream Port Enable Control Bit

This read/write bit determines whether the enabled or disabled state should be assigned to the downstream port. Setting this bit 1 to enable the port and clear the bit to disable the port. In the enabled state a full-speed port propagates all downstream signaling, a low- speed port propagates downstream low-speed packet traffic when preceded by the preamble PID. An enabled port propagates all upstream signaling including full speed and low speed packets. This

MC68HC(7)08KH12 — Rev. 1.1	Advance Information
Freescale Semiconductor	121