TNETX3270

ThunderSWITCH24/3 ETHERNETSWITCH

WITH 24 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS

SPWS043B ± NOVEMBER 1997 ± REVISED APRIL 1999

Terminal Functions (Continued)

10-Mbit/s MAC multiplexed interface (ports 00±23) is multiplexed into three groups (TH0, TH1, and TH2) of eight ports² (continued)

TERMINAL

 

I/O

INTERNAL

DESCRIPTION

NAME

NO.

RESISTOR

 

 

 

 

 

 

 

TH0TXD3

218

 

 

 

TH0TXD2

217

 

 

 

TH0TXD1

216

 

 

 

TH0TXD0

215

 

 

 

TH1TXD3

239

 

 

Interface transmit data. The transmit data nibble for the current port is synchronous to

TH1TXD2

237

O

None

THxCLK. When THxTXEN is asserted, these signals carry data. THxTXD3±THxTXD0 are

TH1TXD1

236

used during renegotiation to convey flow-control and duplex configuration requests to the

 

 

TH1TXD0

234

 

 

PHY. THxTXD0 is the least significant bit and THxTXD3 is the most significant bit.

TH2TXD3

20

 

 

 

TH2TXD2

19

 

 

 

TH2TXD1

18

 

 

 

TH2TXD0

16

 

 

 

 

 

 

 

 

TH0RXDV

226

 

 

Interface receive data valid. When THxRXDV is a 1, it indicates that the THxRXD lines contain

TH1RXDV

6

I

Pulldown

valid data.

TH2RXDV

26

 

 

 

 

 

 

 

 

 

 

² THx = TH0, TH1, and TH2

10-/100-Mbit/s MAC interface (ports 24±26)³

 

TERMINAL

 

I/O

INTERNAL

DESCRIPTION

 

 

NAME

NO.

RESISTOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M24COL

42

 

 

Collision sense. Assertion of MxxCOL in half-duplex signal indicates a network collision

 

M25COL

65

I

Pulldown

on that port. In full-duplex operation, transmission of new frames does not start if this

 

M26COL

90

 

 

terminal is asserted.

 

 

 

 

 

 

 

 

 

 

 

M24CRS

43

 

 

 

 

 

M25CRS

66

I

Pulldown

Carrier sense. MxxCRS indicates a frame carrier signal is being received.

 

M26CRS

92

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Speed selection (force 10 Mbit/s is active low)

 

 

 

 

54

 

 

 

 

M24FORCE10

 

 

I/O§

 

± If pulled low by either the TNETX3270 or a PHY, the port operates at 10 Mbit/s.

 

M25FORCE10

80

Pullup

± If not pulled low by either the TNETX3270 or a PHY, the internal pullup resistor holds

 

M26FORCE10

104

 

 

Ω

pullup resistor

 

 

 

 

this signal high and the port operates at 100 Mbit/s. An external 4.7-k

 

 

 

 

 

 

 

connected to VDD(3.3V) may be required, depending on the system layout.

 

M24LINK

52

 

 

Connection status. MxxLINK indicates the presence of a port connection.

 

 

M25LINK

78

I

Pulldown

± If MxxLINK = 0, there is no link.

 

 

M26LINK

102

 

 

± If MxxLINK = 1, the link is good.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Duplex selection (force half duplex is active low)

 

 

 

53

 

 

 

 

M24FORCEHD

 

I/O³

 

± If pulled low by either the TNETX3270 or the PHY, the port operates at half duplex.

 

M25FORCEHD

79

Pullup

± If not pulled low by either the TNETX3270 or the PHY, the internal pullup resistor holds

 

M26FORCEHD

103

 

 

Ω

pullup resistor

 

 

 

 

this signal high and the port operates at full duplex. An external 4.7-k

 

 

 

 

 

 

 

connected to VDD(3.3V) may be required, depending on the system layout.

 

M24RCLK

44

 

 

 

 

 

M25RCLK

67

I

Pullup

Receive clock. Receive clock source from the attached PHY or PMI device.

 

M26RCLK

93

 

 

 

 

 

 

 

 

 

 

 

 

 

³xx = ports 24, 25, and 26

§ Not a true bidirectional terminal. It can only be actively pulled down (open drain).

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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Texas Instruments TNETX3270 10-/100-Mbit/s MAC interface ports 24±26³, Terminal Internal Description Name Resistor