Intel cPCI-7200 manual Timing Characteristic, ≥ 60ns CYC ≥ 5 PCI CLK Cycle ≥ 2ns ≥ 30ns

Page 37

4.5 Timing Characteristic

1.I_REQ as input data strobe (Rising Edge Active)

 

 

th

tl

IN_ I_REQ

 

 

tcyc

 

 

 

D10~DI31

 

valid data

valid data

 

s

tn

 

 

t

 

th 60ns

tI 60ns

tCYC 5 PCI CLK Cycle

ts 2ns

tn 30ns

 

2.I_REQ as input data strobe (Falling Edge Active)

 

th

 

tl

IN_R I_REQ

 

 

 

 

 

tcyc

 

D10~DI31

valid data

valid data

 

t

tn

 

 

s

 

 

th 60ns

tI 60ns

 

tCYC 5 PCI CLK Cycle

ts 2ns

tn 30ns

 

 

 

 

 

Operation Theorem 27

Image 37
Contents NuDAQ / NuIPC PCI-7200 / cPCI-7200 Page Trademarks Page Questions Getting service from AdlinkPage Table of Contents Ii ∙ Table of Contents 7200DITimerProgramming Guide 7200DI 7200DIChannelPage How to Use This Guide Applications IntroductionIntroduction ∙ Specifications FeaturesMaximum Transfer Speed ∙ IntroductionDimension ConnectorPower Consumption Input VoltageProgramming Library Software SupportingPCIS-LVIEW LabVIEW Driver PCIS-ISG ISaGRAFTM driver Installation ∙ InstallationWhat You Have ∙ Installation Device Installation for Windows SystemsUnpacking PCI -Bus Controller CPCI/PCI-7200’s Layout1b cPCI-7200 Layout Diagram 10 ∙ Installation Hardware configuration Hardware Installation OutlineCN1 Pin Assignments 12 ∙ Installation Connector Pin AssignmentsCN2 Pin Assignments Installation ∙ CPCI-7200 Pin Assignments 14 ∙ Installation8254 configuration 8254 for Timer Pacer GenerationI/O Registers Format Registers Format16 ∙ Registers Format Digital Output Register Base + Digital Input Register Base +DIO Status & Control Register Base + Digital Output Mode Setting Digital Input Mode Setting18 ∙ Registers Format Digital I/O Fifo Status Interrupt Status & Control Register Base + 1CAddress Base + 1C Attribute READ/WRITE Data Format Interrupt Control20 ∙ Registers Format Timer Configuration ControlFifo Control and Status cPCI-7200 only Ireq Polarity SelectionFifoff Read only Full flag of the DI Fifo 1 DI Fifo is full 22 ∙ Registers Format 8254 Timer Registers Base +Direct Program Control Operation TheoremOperation Theorem ∙ Timer Timer Pacer Mode24 ∙ Operation Theorem Handshaking External Clock Mode26 ∙ Operation Theorem Inreq Inack≥ 60ns CYC ≥ 5 PCI CLK Cycle ≥ 2ns ≥ 30ns Timing Characteristic≥ 0ns ≥ 60ns ≥ 2 PCI CLK Cycle ≥ 1 PCI CLK Cycle Outreq O REQ Outack O ACK ++ Libraries Libraries Installation30 ∙ C/C++ Libraries ++ Libraries ∙ Programming GuideVisual C++ Windows 7200InitialVisual Basic Windows ++ DOS7200AUXDI 7200SwitchCardNo7200AUXDO 7200AUXDIChannel34 ∙ C/C++ Libraries 7200DI 7200AUXDOChannel11 7200DO 10 7200DIChannel36 ∙ C/C++ Libraries 12 7200DOChannel 38 ∙ C/C++ Libraries 13 7200AllocDMAMem15 7200AllocDBDMAMem 14 7200FreeDMAMem17 7200DIDMAStart 16 7200FreeDBDMAMem40 ∙ C/C++ Libraries ++ Libraries ∙ 42 ∙ C/C++ Libraries Clearfifo 18 7200DIDMAStatus20 7200DblBufferMode 19 7200DIDMAStop44 ∙ C/C++ Libraries 22 7200DblBufferTransfer 21 7200CheckHalfReady24 7200DODMAStart 23 7200GetOverrunStatus46 ∙ C/C++ Libraries Mode 25 7200DODMAStatusThis memory should be double-word alignment 48 ∙ C/C++ Libraries 26 7200DODMAStop@ Argument 27 7200DITimer50 ∙ C/C++ Libraries 28 7200DOTimerInt W7200DOTimer U16 c1, U16 c2, Booelan mode 52 ∙ Double Buffer Mode Principle Double Buffer Mode PrincipleDouble Buffer Mode Principle ∙ 54 ∙ Limitation LimitationProduct Warranty/Service ∙ Product Warranty/Service

PCI-7200, cPCI-7200 specifications

The Intel cPCI-7200 is a high-performance, rugged computing platform designed to meet the demands of embedded and telecommunications applications. As a part of Intel’s CompactPCI family, the cPCI-7200 highlights the commitment to providing advanced processing capabilities in a flexible and modular form factor.

One of the standout features of the cPCI-7200 is its powerful multicore processing capabilities. It is equipped with Intel's latest x86 architecture, offering multiple cores that enable efficient execution of parallel tasks. This makes the cPCI-7200 particularly suitable for applications requiring real-time processing, such as network and communication systems. Additionally, the system supports high-speed data transfer, essential for bandwidth-intensive applications.

The cPCI-7200 also integrates advanced I/O technologies, ensuring that users can connect various peripherals and devices. With support for PCI Express, Ethernet, and other high-speed interfaces, the system provides a robust communication backbone for data-intensive applications. The modular design of CompactPCI allows for easy expansion, accommodating custom I/O cards as per specific application needs.

Built to function in harsh environments, the cPCI-7200 is designed with ruggedness in mind. It meets stringent environmental standards, which include resistance to shock, vibration, and temperature extremes. This makes the platform especially suitable for deployment in aerospace, military, and industrial settings where reliability is critical.

Furthermore, the Intel cPCI-7200 incorporates extensive power management features, which enhance overall system efficiency and reduce energy consumption. The adaptive power management capabilities enable the system to adjust power usage based on workload requirements, making it an eco-friendly option in comparison to other embedded systems.

Another significant characteristic of the cPCI-7200 is its scalability. The system can accommodate varying performance levels depending on application demands. Users can select from various processing options and add or remove resources as required, making this platform not only versatile but also cost-effective in the long run.

In summary, the Intel cPCI-7200 is a powerful, flexible, and rugged computing solution that caters to the evolving needs of embedded and telecommunications markets. With its advanced processing capabilities, extensive I/O options, rugged construction, energy-efficient design, and scalable architecture, it stands out as a reliable choice for developers looking to build high-performance applications in various challenging environments.