Intel MB900-R user manual FAN2, FAN3, FAN4 Fan Power Connectors, IDE1 Primary IDE Connectors

Page 23

INSTALLATIONS

FAN2, FAN3, FAN4: Fan Power Connectors

Pin #

Signal Name

 

 

 

1

 

Ground

 

 

 

 

2

 

 

+12V

 

 

 

 

3

 

Rotation detection

 

IDE1: Primary IDE Connectors

 

 

 

 

 

 

 

 

 

 

 

 

 

Signal Name

 

Pin #

 

Pin #

Signal Name

 

 

Reset IDE

 

1

 

2

Ground

 

 

Host data 7

 

3

 

4

Host data 8

 

 

Host data 6

 

5

 

6

Host data 9

 

 

Host data 5

 

7

 

8

Host data 10

 

 

Host data 4

 

9

 

10

Host data 11

 

 

Host data 3

 

11

 

12

Host data 12

 

 

Host data 2

 

13

 

14

Host data 13

 

 

Host data 1

 

15

 

16

Host data 14

 

 

Host data 0

 

17

 

18

Host data 15

 

 

Ground

 

19

 

20

Protect pin

 

 

DRQ0

 

21

 

22

Ground

 

 

Host IOW

 

23

 

24

Ground

 

 

Host IOR

 

25

 

26

Ground

 

 

IOCHRDY

 

27

 

28

Host ALE

 

 

DACK0

 

29

 

30

Ground

IDE1

 

IRQ14

 

31

 

32

No connect

 

Address 1

 

33

 

34

No connect

 

 

Address 0

 

35

 

36

Address 2

 

 

Chip select 0

 

37

 

38

Chip select 1

 

 

Activity

 

39

 

40

Ground

PCIE_1: x16 PCI Express Slot

PCIE_2: x1 PCI Express Slot

PCI1, PCI5: PCI Slots

CN12: CF Socket

J12: SMBus

This is a 2-pin header. Pin 1 is SMB_CLK; Pin 2 is SMB_DATA.

 

 

MB900-R User’s Manual

19

Image 23
Contents Version USER’S ManualAcknowledgments Table of Contents This page is intentionally left blank Introduction ChecklistCPU FSB MB900-R SpecificationsBoard Dimensions Installations Installing the CPU Installing the Memory ATX Power InstallationSetting the Jumpers Jumper Locations on MB900-R JP1, JP2, JP3 RS232/422/485 COM2 Selection JP4 IDE DMA Mode SettingJP6 Clear Cmos Contents JP7 CF Socket Master / Slave Selection Connectors on MB900-R Connector Locations on MB900 -R ATX2 ATX 12V Power Connector ATX1 24-pin ATX Power ConnectorCN2, J2, J7, J8 COM1/2/3/4 Serial Ports CN1 PS/2 Keyboard and PS/2 Mouse ConnectorsCN4 VGA CRT Connector CN3 Parallel Port Connector TX+ J3 Audio Front Header J1 Digital I/O Connector 4 in, 4 outJ5 USB4/USB5 Connector J6 USB6/USB7 ConnectorFAN1 CPU Fan Power Connector J9 Wake On LAN ConnectorJ10 System Function Connector J11 IrDA ConnectorIDE1 Primary IDE Connectors FAN2, FAN3, FAN4 Fan Power ConnectorsSample Code Watchdog Timer ConfigurationSetW627EHFLD0x08 UnlockW627EHF OutportbW627EHFINDEXPORT, REG OutportbW627EHFDATAPORT, Data LockW627EHF Switch to logic device Bios Setup Bios Setup Bios IntroductionPhoenix AwardBIOS Cmos Setup Utility Date Standard Cmos SetupDrive a / Drive B TimeIDE Channel Master/Slave Halt On VideoVirus Warning Advanced Bios FeaturesCPU Feature Hard Disk Boot PriorityBoot Up Floppy Seek Quick Power On Self TestFirst/Second/Third Boot Device Boot Other DeviceMPS Version Control for OS Typematic Delay MsecApic Mode Security OptionCAS Latency Time Advanced Chipset FeaturesDram RAS# to CAS# Delay Dram Timing SelectableOn-Chip VGA Setting Precharge Delay tRASSystem Bios Cacheable Video Bios CacheableOnChip IDE Device Integrated PeripheralsOnChip Primary/Secondary PCI IDE IDE HDD Block ModeIDE DMA Transfer Access On-chip Primary PCI IDE EnabledHot Key Power on On-Chip Serial ATA SettingPower on Function KB Power on PasswordPwron After PWR-Fail Uart Mode SelectOnboard Serial Port Acpi Function Power Management SetupRUN Vgabios if S3 Resume Power ManagementResume by Alarm Suspend ModeHDD Power Down Power On by RingReload Global Timer Events PNP/PCI Configurations PC Health Status CPU Warning TemperatureTemperatures/Voltages Spread Spectrum Modulated Frequency/Voltage ControlCPU Clock Ratio Auto Detect PCI ClkSave & Exit Setup Load Fail-Safe DefaultsLoad Optimized Defaults Set Supervisor PasswordDrivers Installation Intel 945G Chipset Software Installation Utility Drivers Installation Intel 945G Chipset Graphics Driver Realtek Codec Audio Driver Installation Marvell 88E8052 LAN Drivers Installation Intel PRO LAN Drivers Installation This page is intentionally left blank O Port Address Map AppendixLevel Function Interrupt Request Lines IRQ