Intel US15W H8S Jtag Programming Headers, Mini Card B connector J2G1 is disabled by default

Page 36

Reference Board Summary

4.8.2Mini Card B connector (J2G1) is disabled by default

To enable the port for Mini Card B (J2G1), PCI Express* Slot 0 (J7C1) and USB Port 0 (J2A1) devices must be redirected to the Mini Card B connector.

Table 13. Mini Card B Board Rework to Enable Functionality

Rework

Impacted components

Comments

 

 

 

 

 

Rework provides proper USB and SIM card

 

 

connectivity for wireless WAN cards from

 

 

Sierra Wireless* and Option* only. However,

 

Remove – R2B2, R2B4

there are a significant number of additional

Enable Mini Card B

Populate – R2B3, R2B5, R8Y7,

no-stuff components that must be populated

for full functionality. Refer to the Mini Card B

 

R8W19, R8Y2, R8Y1,

 

sheet of the Crown Beach Schematics for

 

R8W22

 

details.

 

 

 

 

USB Port 0 functionality through connector

 

 

J2A1 is disabled when Mini Card B is enabled.

 

 

 

4.9H8S (JTAG) Programming Headers

The microcontroller firmware for system management/keyboard/mouse control can be upgraded in two ways:

1.By use of a special MS-DOS utility (in-circuit).

2.By use of an external computer connected (remotely) to the system through the serial port on the board.

4.9.1H8 In-System Programming

If the user chooses in-system programming of the Crown Beach board, ensure that the following files are available on the DOS bootable media:

1.

EC_xx.bin

- EC application

2.

Fcntl.bin

- Renesas Technology* flash algorithm data file

3.

Kscflash.exe

- downloader

Boot to a DOS environment on the Crown Beach machine and type “kscflash ec_xx.bin” to begin programming the EC.

4.9.2H8 Remote Programming

If the user chooses to use an external computer (remote programming) connected to the system through the serial port, there are three jumpers that must be set correctly. Refer to Table 9 for a summary of these jumpers and refer to the Crown Beach schematic for the location of each jumper.

The sequence of events necessary to program the H8 is as follows:

User’s Manual

36

Document Number: 320264

Image 36
Contents User’s Manual July Document # RevisionUser’s Manual Document Number Contents Power Up Figures TablesRevision History Document Revision DescriptionInitial release Release for public postingIntroduction About the Development KitTerminology Term DefinitionTechnical Support Additional Technical SupportProduct Literature Related DocumentsIntel Literature Centers Related DocumentsCrown Beach Board Block Diagram Crown Beach BoardGetting Started Crown Beach Board Top ViewMajor Features Crown Beach Feature Set SummaryFeature Crown Beach Board Comments Implementation OverviewSDIO/MMC Processor Support Processor Voltage RegulatorsSMC/KBC Subsystem Descriptions Intel SCH ChipsetSystem Memory DisplayManufacturer Size Resolution Back Aspect Part# PCI Express* SlotsSoft Audio/Soft Modem Crown Beach Supported Lvds DisplaysUSB Connectors Pata StorageLPC Slot System Management Controller SMC/Keyboard Controller KBCEFI Firmware Hub FWH Trusted Platform Module TPM Header12 SD/SDIO/MMC ClocksPower Supply Solution In-Target Probe ITP and Debug SupportBoard Size Board TechnologyPower Management Power Measurement SupportPower Measurement Resistor EquationCrown Beach Voltage Rails Agilent 34401A 6½ digitSch Component Voltage Supply Rail Ref Des Resistor DDR2VR LvdsddcLvdsbcklt LvdsvdlKeyboard Vcore +V12SCPU+V12S Crown Beach Board Features ConnectorsReference Board Summary Back Panel Connectors Ref Des DescriptionConfiguration Settings Configuration Jumpers/SwitchesConfiguration Jumper/Switches Settings BbprogPSON# Bsel Jumper Settings Bsel Jumper SettingsManual VID Support for CPU ProcessorPower On and Reset Push Buttons Crown Beach Manual VIDLEDs Crown Beach LEDsFunction Reference Designator PCI Express* X1 Slots and Mini Card Connectors Mini Card a connector J7H1 is enabled by defaultPCI Express* Slot 1 Board Rework to Enable Functionality Rework Impacted components CommentsMini Card B connector J2G1 is disabled by default Mini Card B Board Rework to Enable FunctionalityH8S Jtag Programming Headers 1 H8 In-System ProgrammingReference Board Summary Uart Connector H8 Programming JumpersJtag Quick Start Required PeripheralsGraphics Assembly Lvds Panel Samsung 15 inch 381.00 mm PanelCrown Beach Board Lvds Cable Connected to the Crown Beach Board Power Up Powering Up the Board EFI Firmware Updates Appendix a Daughter and Plug-In Cards Mott Canyon 4 Interposer CardJumper Settings Mott Canyon 4 Interposer CardMott Canyon 4 Interposer Card Configuration Jumper/Switches Description Default Setting Optional Setting ReferenceFirmware Configuration Appendix B Intel MVP-6 VID Codes Voltage Identification DefinitionVID6 VID5 VID4 VID3 VID2 VID1 VID0 VCC 5625 Appendix C External Features External Feature Location Front of ChassisExternal Feature Location Rear of Chassis Rear Chassis View with Board Installed

US15W specifications

The Intel US15W is an embedded chipset designed to meet the demands of ultra-low power computing environments. Released in 2008, this chipset was aimed at small form-factor devices such as netbooks, thin clients, and embedded systems. With its unique blend of features, the US15W has played a crucial role in the evolution of low-power computing technologies.

One of the standout characteristics of the US15W chipset is its integration of a single-chip design, which significantly reduces the overall footprint of the system. This is particularly advantageous for manufacturers looking to create compact devices without compromising on performance. The chipset integrates the Intel Atom processor, which is known for its efficient power consumption and solid performance for lightweight applications. The combination provides a balance between energy efficiency and processing capability, making it suitable for various applications ranging from internet browsing to multimedia playback.

Another major feature of the Intel US15W is its support for Intel's Graphics Media Accelerator 500, which enhances visual performance by providing hardware acceleration for graphics rendering. This capability enables smoother video playback and improved graphical user interfaces, which are essential for user-centric devices.

The US15W chipset also supports various connectivity options, including USB 2.0 and Serial ATA (SATA) interfaces. This flexibility allows for ease in peripheral connectivity and storage solutions, accommodating the needs of embedded applications and consumer electronics alike. Moreover, the chipset supports Intel's Enhanced SpeedStep technology, a power management feature that adjusts processor voltage and frequency based on workload, helping to extend battery life in portable devices.

In terms of memory support, the Intel US15W can handle up to 2GB of DDR2 RAM, which is adequate for many embedded computing tasks. The chipset is designed to facilitate efficient thermal management, which is crucial in maintaining long-lasting performance in compact and thermally constrained environments.

Overall, the Intel US15W chipset exemplifies the shift towards energy-efficient, compact computing solutions. Its innovative integration of features, support for modern graphics, and robust connectivity options make it a significant player in the embedded chipset market. As technology continues to evolve, the US15W remains a testament to Intel's commitment to providing high-performance solutions that meet the demands of modern computing without sacrificing power efficiency.