Intel 21555 manual Clamping Voltage, Clock Configuration Jumpers, Voltage Clampa

Page 11

Introduction

1.6.1Clock Configuration

Table 3 describes the resistor jumpers to install that connect p_clk and s_clk_o to the Mictor connectors. To improve signal integrity and minimize noise, these signals are not wired to the Mictor connectors. Resistor jumpers also control the selection of clock signals. See Figure 3 on page 10 for the resistor jumper locations. See Table A-3 on page 24 for Mictor pinouts.

Table 3. Clock Configuration Jumpers

Clock Source

Installed

Removed

 

 

 

Use the s_clk_o signal from the 21555 as the local

R65, R73

R68, R93

clock.

 

 

 

 

 

Use the s_clk_i that is the output of the clock buffer

R73

R68

as the local clock.

 

 

 

 

 

Use the system slot to drive the 21555 s_clk_i.

R68

R73

 

 

 

Use an oscillator as the asynchronous local clock.

R93

R65, R68

 

 

 

Use the system slot to provide the local clock.

R92, R116, R69

R91, R115, R72

 

 

 

Use the clock buffer to provide the local clock.

R91, R115, R72

R92, R116, R69

 

 

 

1.6.2Clamping Voltage

Table 4 gives the clamping voltage resistor jumper configurations. These jumper resistors designate the DE1B55503 as a 3.3V or a 5V PCI device. A mix of 3.3 and 5 V cards is not allowed. The E1 regulator provides the 3.3V or 5 V clamping voltage for the local bus. The resistor jumpers connect s_vio to either 3.3V or 5V. Figure 4 on page 12 shows the location of the resistor jumpers.

Table 4. Voltage Clampa

Function

Installed

Removed

 

 

 

s_vio is 3.3V

R95

R97

 

 

 

s_vio is 5V

R97

R95

 

 

 

a.Only one jumper resistor (R95 or R97) may be installed at a time. Installing both or no jumper resistors is not allowed.

21555 PCI-to-PCI Bridge Evaluation Board User’s Guide

11

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Contents User’s Guide PCI-to-PCI Bridge Evaluation BoardPCI-to-PCI Bridge Evaluation Board User’s Guide Contents Tables Overview FeaturesIntroduction Major Components ConnectorsDevices Switches and JumperSwitches Switch SettingsStake-Pin Jumper a DIP Switch OperationSwitch Switch Controls Reference Information Pack Stake-Pin JumperJumper Resistors Resistor JumpersVoltage Clampa Clock ConfigurationClock Configuration Jumpers Clamping VoltageType Device Configuration NumberingSecondary Slot Numbering and Idsel Mapping Slot and Idsel MappingDevice Number Interrupt Pin on Interrupt Pin on Board Interrupt RoutingInterrupt ORing DE1B55503 with One Local Bus Option Card Typical ConfigurationsDE1B55503 with Two Local Bus Option Cards Page Software Requirements Operations and InstallationHardware Requirements Programming the Flash ROM Switch Operation for Srom programmingSwitch Switch Up Description Pack Down Programming the SromSwitch Switch Down Switch Up a Description Pack Installation ProcedureSwitch Operation for Flash programming Interrupt ORing Central Function and Arbiter Control Optional ConfigurationsPicmg Configuration J9 Picmg SwitchesAsynchronous Clocking External Arbiter Switch OptionSwitch Switch Down Switch Up Description Pack Schematic Mictor Signal and Default InformationJ2 J4, J5, and J6 Connector Pinouts Table A-1. J2 Connector Secondary AD SignalsTable A-3. J5 CBE, REQ, and GNT Table A-2. J4 Pin AssignmentsTable A-4. J6, Parallel ROM and Control Table A-6. Switch Pack Factory Defaults Jatag Connector PinoutFactory Default Switch and Jumper Configuration Table A-5. J1 Jatag Connector
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21555 specifications

The Intel 21555 is a prominent microprocessor developed by Intel, designed to cater to a variety of computing needs. This processor marks a significant step forward in Intel's lineup and underscores the company's commitment to advancing technology in personal computing, enterprise solutions, and beyond.

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