Intel 21555 manual Jatag Connector Pinout, Factory Default Switch and Jumper Configuration

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Signal and Default Information

A.2 JATAG Connector Pinout

Table A-5gives the pin assignments between the DE1B55503 schematic and the ten-pin JTAG connector. See Figure 1 on page 6 for the location of this connector.

Table A-5. J1 JATAG Connector

Schematic

Mictor

 

Mictor

Schematic

Number

Pin Number

 

Pin Number

Number

 

 

 

 

 

 

 

 

 

1

 

2

GND

 

TRST

 

 

 

 

 

 

 

 

 

TDI

3

 

4

GND

 

 

 

 

 

 

 

TD0

5

 

6

GND

 

 

 

 

 

 

 

TMS

7

 

8

GND

 

 

 

 

 

 

 

TCK

9

 

10

GND

 

 

 

 

 

 

 

A.3 Factory Default Switch and Jumper Configuration

The DE1B55503 is configured at the factory for normal or typical operation.

J8, the stake pin jumper, is not installed

Table A-6gives the factory configuration for the switch pack switches.

Table A-6. Switch Pack Factory Defaults

Switches on

Are set at the Factory.a

 

 

J9

all switches are in the up position.

 

 

J20

SW1, SW2, and SW4 are n the up position

 

SW3 and SW5 are down.

 

 

 

J21

all switches are in the up position.

 

 

a.The UP position leaves the switch lever pointing towards the local option sockets.

Table A-7gives the configuration of the zero-ohm resistor jumpers.

Table A-7. Resistor Jumper Factory Defaults

Resistor

In/Out

 

Resistor

In/Out

Jumper

 

Jumper

 

 

 

 

 

 

 

 

R65

IN

 

R92

OUT

 

 

 

 

 

R68

OUT

 

R93

OUT

 

 

 

 

 

R69

OUT

 

R95

OUT

 

 

 

 

 

R72

IN

 

R97

IN

 

 

 

 

 

R73

IN

 

R115

IN

 

 

 

 

 

R91

IN

 

R116

OUT

 

 

 

 

 

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21555 PCI-to-PCI Bridge Evaluation Board User’s Guide

Image 26
Contents PCI-to-PCI Bridge Evaluation Board User’s GuidePCI-to-PCI Bridge Evaluation Board User’s Guide Contents Tables Overview FeaturesIntroduction Connectors Major ComponentsSwitches and Jumper DevicesSwitch Settings SwitchesStake-Pin Jumper DIP Switch OperationSwitch Switch Controls Reference Information Pack Stake-Pin Jumper aResistor Jumpers Jumper ResistorsClamping Voltage Clock ConfigurationClock Configuration Jumpers Voltage ClampaSlot and Idsel Mapping Device Configuration NumberingSecondary Slot Numbering and Idsel Mapping TypeDevice Number Interrupt Pin on Interrupt Pin on Board Interrupt RoutingInterrupt ORing Typical Configurations DE1B55503 with One Local Bus Option CardDE1B55503 with Two Local Bus Option Cards Page Software Requirements Operations and InstallationHardware Requirements Programming the Srom Switch Operation for Srom programmingSwitch Switch Up Description Pack Down Programming the Flash ROMSwitch Switch Down Switch Up a Description Pack Installation ProcedureSwitch Operation for Flash programming Interrupt ORing J9 Picmg Switches Optional ConfigurationsPicmg Configuration Central Function and Arbiter ControlAsynchronous Clocking External Arbiter Switch OptionSwitch Switch Down Switch Up Description Pack Table A-1. J2 Connector Secondary AD Signals Signal and Default InformationJ2 J4, J5, and J6 Connector Pinouts Schematic MictorTable A-2. J4 Pin Assignments Table A-3. J5 CBE, REQ, and GNTTable A-4. J6, Parallel ROM and Control Table A-5. J1 Jatag Connector Jatag Connector PinoutFactory Default Switch and Jumper Configuration Table A-6. Switch Pack Factory Defaults
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21555 specifications

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