Intel M570TU manual Sheet 4 Cantiga 1/5 Host, N T I G a

Page 61

Cantiga 1/5 Host

Schematic Diagrams

V D D 3

3/12_Cost down

 

 

 

R 4 6 9

2

H _ D # [ 6 3 : 0 ]

 

 

 

 

 

 

 

 

 

 

 

 

*1 K _ 1 % _

0 4

 

 

 

 

 

 

MC H _T M P _ S E N 2 2

 

 

 

 

 

 

 

 

T R 2

 

 

 

 

 

 

 

 

 

 

* 1 0 K (0 6

0 3)

 

 

Layout Notice:

0.1uF should be placed 100mils or less from GMCH pin.

Layout Notice:

10 mils wide, 20 mils spacing

R 4 33

 

2 4 . 9 _ 1 % _ 04 MC H _H R C O M P

 

 

 

Layout Notice:

MCH_HSWING a 10 mils traces and 20 mils spacing

1 . 0 5 V S

R 4 2 1

H_D # 0

H_D # 1

H_D # 2 H _D # 3

H_D # 4

H_D # 5

H_D # 6 H _D # 7

H_D # 8

H_D # 9

H_D # 1 0 H _D # 1 1

H_D # 1 2

H_D # 1 3

H_D # 1 4 H _D # 1 5

H_D # 1 6

H_D # 1 7

H_D # 1 8 H _D # 1 9

H_D # 2 0

H_D # 2 1

H_D # 2 2 H _D # 2 3

H_D # 2 4

H_D # 2 5

H_D # 2 6 H _D # 2 7

H_D # 2 8

H_D # 2 9 H _D # 3 0

H_D # 3 1

H_D # 3 2

H_D # 3 3 H _D # 3 4

H_D # 3 5

H_D # 3 6

H_D # 3 7 H _D # 3 8

H_D # 3 9

H_D # 4 0

H_D # 4 1 H _D # 4 2

H_D # 4 3

H_D # 4 4

H_D # 4 5 H _D # 4 6

H_D # 4 7

H_D # 4 8

H_D # 4 9 H _D # 5 0

H_D # 5 1

H_D # 5 2

H_D # 5 3 H _D # 5 4

H_D # 5 5

H_D # 5 6 H _D # 5 7

H _D # 5 8

H _D # 5 9

H _D # 6 0

H

_D # 6 1

H

_D # 6 2

F 2

G8

F 8

E 6

G2

H 6

H 2

F 6

D 4

H 3

M9

M11

J1

J2

N12

J6 P 2 L2

R 2 N 9 L6 M5

J3 N 2 R 1 N 5

N 6

P13 N 8

L7

N10

M3 Y 3

A D 14

Y 6

Y10 Y 12

Y 14 Y 7 W 2 A A 8

Y 9

A A 13

A A 9

A A 11

A D 11

A D 10

A D 13

A E 12

A E 9

A A 2

A D 8 A A 3

A D 3 A D 7

A E 14

A F 3

A C 1 A E 3 A C 3

A E 11

A E 8

A G2

U 27

A

H _

D # _ 0

H _

D # _ 1

H _

D # _ 2

H _

D # _ 3

H _

D # _ 4

H _

D # _ 5

H _

D # _ 6

H _

D # _ 7

H _

D # _ 8

H _

D # _ 9

H _

D # _ 1 0

H _

D # _ 1 1

H _

D # _ 1 2

H _

D # _ 1 3

H _

D # _ 1 4

H _

D # _ 1 5

H _

D # _ 1 6

H _

D # _ 1 7

H _

D # _ 1 8

H _

D # _ 1 9

H _

D # _ 2 0

H _

D # _ 2 1

H _

D # _ 2 2

H _

D # _ 2 3

H _

D # _ 2 4

H _

D # _ 2 5

H _

D # _ 2 6

H _

D # _ 2 7

H _

D # _ 2 8

H _

D # _ 2 9

H _

D # _ 3 0

H _

D # _ 3 1

H _

D # _ 3 2

H _

D # _ 3 3

H _

D # _ 3 4

H _

D # _ 3 5

H _

D # _ 3 6

H _

D # _ 3 7

H _

D # _ 3 8

H _

D # _ 3 9

H _

D # _ 4 0

H _

D # _ 4 1

H _

D # _ 4 2

H _

D # _ 4 3

H _

D # _ 4 4

H _

D # _ 4 5

H _

D # _ 4 6

H _

D # _ 4 7

H _

D # _ 4 8

H _

D # _ 4 9

H _

D # _ 5 0

H _

D # _ 5 1

H _

D # _ 5 2

H _

D # _ 5 3

H _

D # _ 5 4

H _

D # _ 5 5

H _

D # _ 5 6

H _

D # _ 5 7

H _

D # _ 5 8

H _

D # _ 5 9

H _

D # _ 6 0

H _

D # _ 6 1

H _

D # _ 6 2

HOST

H _ A # _ 3

H _ A # _ 4

H _ A # _ 5

H _ A # _ 6

H _ A # _ 7

H _ A # _ 8

H _ A # _ 9

H _ A #_ 1 0

H _ A #_ 1 1

H _ A #_ 1 2

H _ A #_ 1 3

H _ A #_ 1 4

H _ A #_ 1 5

H _ A #_ 1 6

H _ A #_ 1 7

H _ A #_ 1 8

H _ A #_ 1 9

H _ A #_ 2 0

H _ A #_ 2 1

H _ A #_ 2 2

H _ A #_ 2 3

H _ A #_ 2 4

H _ A #_ 2 5

H _ A #_ 2 6

H _ A #_ 2 7

H _ A #_ 2 8

H _ A #_ 2 9

H _ A #_ 3 0

H _ A #_ 3 1

H _ A #_ 3 2

H _ A #_ 3 3

H _ A #_ 3 4

H _ A #_ 3 5

H _ A D S #

H _ A D S T B # _ 0 H _ A D S T B # _ 1

H_ B N R # H _ B P R I #

H_B R E Q# H _ D E F E R #

H_D B S Y #

H P L L_ C L K

HP L L _C L K # H _D P W R # H _ D R D Y #

H _ H I T #

H _ H I T M#

H_ L OC K # H _T R D Y #

H_ D I N V # _ 0 H _ D I N V # _ 1

H_ D I N V # _ 2 H _ D I N V # _ 3

H_ D S T B N # _ 0 H _ D S T B N # _ 1 H _ D S T B N # _ 2 H _ D S T B N # _ 3

A 1 4

C 1 5

F 1 6

H 1 3

C 1 8

M1 6

J1 3

P 1 6

R 1 6

N 1 7

M1 3

E 1 7

P 1 7

F 1 7

G2 0

B 1 9

J1 6

E 2 0

H 1 6

J2 0

L1 7

A 1 7

B 1 7

L1 6

C 2 1

J1 7

H 2 0

B 1 8

K 1 7

B 2 0

F 2 1

K 2 1

L2 0

H 1 2

B 1 6

G1 7

A 9

F 1 1 G1 2 E 9 B 1 0

A H 7 A H 6 J1 1 F 9

H 9 E 1 2 H 1 1 C 9

J8

L3

Y 1 3

Y 1

L1 0

M7

A A 5

A E 6

H _ A # 3

H _ A # 4

H _ A # 5

H _ A # 6

H _ A # 7

H _ A # 8

H _ A # 9

H _ A # 1 0

H _ A # 1 1

H _ A # 1 2

H _ A # 1 3

H _ A # 1 4

H _ A # 1 5

H _ A # 1 6

H _ A # 1 7

H _ A # 1 8

H _ A # 1 9

H _ A # 2 0

H _ A # 2 1

H _ A # 2 2

H _ A # 2 3

H _ A # 2 4

H _ A # 2 5

H _ A # 2 6

H _ A # 2 7

H _ A # 2 8

H _ A # 2 9

H _ A # 3 0

H _ A # 3 1

H _ A # 3 2

H _ A # 3 3

H _ A # 3 4

H _ A # 3 5

H _ A # [ 3 5 : 3 ] 2

H _ A D S #

2

2

H _ A D S T B # 0

H _ A D S T B # 1

2

H _ B N R #

2

 

H _ B P R I #

2

 

H _ B R 0 #

2

 

H _ D E F E R #

2

H _ D B S Y #

2

 

C L K _ M C H _ B C L K 1 8

C L K _ M C H _ B C L K # 1 8

H _ D P W R #

2

H _ D R D Y #

2

 

H _ H I T#

2

 

H _ H I TM #

2

 

H _ L OC K #

2

 

H _ T R D Y #

2

 

H _ D I N V # 0

2

 

H _ D I N V # 1

2

 

H _ D I N V # 2

2

 

H _ D I N V # 3

2

 

H _ D S T B N # 0

2

H _ D S T B N # 1

2

H _ D S T B N # 2

2

H _ D S T B N # 3

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Host Clock

 

 

 

 

 

 

 

 

BSEL2

 

BSEL1

 

BSEL0

 

Frequency

 

 

 

 

 

 

 

0

 

0

1

 

533 MHz

 

 

 

 

 

 

 

0

 

1

1

 

667 MHz

 

 

 

 

 

 

 

0

 

1

0

 

800 MHz

 

 

 

 

 

 

 

0

 

0

0

 

1066 MHz

 

 

2008/1/15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DVT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 . 0 5 V S

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 5 9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* 56 _ 0 4

 

 

 

 

2 , 1 8 C P U _B S E L 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 7 9

 

1 K _ 0 4

 

 

R 7 8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 K _ 0 4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MC H _ B S E L 0

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 . 0 5 V S

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 5 7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 K _ 0 4

 

2 , 1 8 C P U _B S E L 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 7 7

*0 _ 0 4

 

 

R 7 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 K _ 0 4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MC H _ B S E L 1

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 . 0 5 V S

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 5 5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* 1K

_ 04

 

 

 

 

Sheet 4 of 42

Cantiga 1/5 Host

B.Schematic Diagrams

22 1 _ 1 % _ 0 4

H _D # 6 3

A D 6

H _ D # _ 6 3

H _ D S T B P # _ 0

L9

H _ D S T B P # 0 2

M8

 

 

 

 

 

10mils

 

 

 

MC H _ H S W I N G

C 5

 

 

 

 

 

 

 

 

 

 

 

 

MC H _ H R C O MP

E 3

1 . 0 5 V S

 

 

R 4 2 9

 

C 5 6 4

 

 

 

 

 

 

 

 

10 0 _ 1 % _ 0 4

 

 

0 . 1 u _ 1 0 V _ 0 4

 

 

 

 

C 12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

H _ C P U R S T #

 

 

 

R 4 2 3

 

 

 

 

 

 

E 11

 

 

 

 

 

 

2

H _ C P U S L P #

 

 

 

1K _ 1% _ 0 4

 

 

 

 

 

 

 

 

 

 

10mils

 

 

100mil Z 0 40 1

A 11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B 11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R 4 2 2

 

 

C 5 5 7

 

C 5 5 5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2K _ 1% _ 0 4

 

 

*0 . 1 u _ 10 V _0 4

* 0 . 1 u _ 10 V _0 4

 

 

 

 

 

EVT 2007/12/15

H _ S W I N G

H _ R C OM P

H _ C P U R S T#

H _ C P U S L P #

H _ A V R E F

H _ D V R E F

C A N T I G A

H _ D S T B P # _ 1

H _ D S T B P # _ 2 H _ D S T B P # _ 3

H _ R E Q# _ 0

H _ R E Q# _ 1 H _ R E Q# _ 2

H _ R E Q# _ 3 H _ R E Q# _ 4

H_ R S # _ 0 H _ R S # _ 1 H _ R S # _ 2

A A 6

 

 

 

H _ D S T B P # 1 2

 

 

 

 

H _ D S T B P # 2

2

A E 5

 

 

 

 

 

 

H _ D S T B P # 3

2

 

 

 

 

B 1 5

H _ R E Q # 0

 

H _ R E Q# [ 4 : 0 ] 2

 

 

 

 

K 1 3

H _ R E Q # 1

 

 

 

 

 

F 1 3

H _ R E Q # 2

 

 

 

 

 

B 1 3

H _ R E Q # 3

 

 

 

 

 

B 1 4

H _ R E Q # 4

 

 

 

 

 

B 6

 

 

 

H _ R S # 0

2

 

F 1 2

 

 

 

 

 

 

 

H _ R S # 1

2

 

C 8

 

 

 

 

 

 

 

H _ R S # 2

2

 

2 , 1 8 C P U _B S E L 2

 

 

 

 

1 K _ 0 4

 

 

R 7 2

 

 

R 7 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 K _ 0 4

 

 

 

 

 

 

 

 

 

 

MC H _ B S E L 2 5

 

 

 

 

 

 

 

 

 

 

2 , 3 , 1 3 , 2 2 , 2 3, 24 , 2 9 , 3 3 , 3 4 , 3 7 , 3 8

V D

D 3

2 , 3 , 9 , 1 3 , 1 6 , 2 3 , 3 2

1 . 0 5 V S

Cantiga 1/5 Host B - 5

Page 60 Page 62
Image 61
Page 60 Page 62
Contents Page Page M570TU Trademarks About this Manual Important Safety Instructions FCC Statement FCC RF Radiation Exposure Statement Instructions for Care and Operation Power Safety Battery Precautions Related Documents Contents XII Introduction Feature Specification System SpecificationsSystem Specifications 1 Mini-Card Slots Top View External Locator Top View with LCD Panel OpenOverheating External Locator Front & Rear ViewRight & Left Side View External Locator Right & Left Side ViewBottom View External Locator Bottom ViewMainboard Top Key Parts Mainboard Overview Top Key PartsMainboard Bottom Key Parts Mainboard Overview Bottom Key PartsMainboard Top Connectors Mainboard Overview Top ConnectorsMainboard Bottom Connectors Mainboard Overview Bottom ConnectorsOverview DisassemblyDisassembly Maintenance Precautions To remove the VGA Card To remove the Modem Disassembly StepsTo remove the Inverter Board Battery Removal Removing the BatteryRemoving the Hard Disk Drive HDD Assembly RemovalHDD Assembly Removal cont’d Optical Device Removal Removing the Optical CD/DVD DeviceRAM Module Removal Removing the System Memory RAMProcessor Removal Removing and Installing the ProcessorUnlock Processor Removal Cont’dRemove the sticker Processor InstallationVGA Card Removal Removing the VGA CardWireless LAN Module Removal Removing the Wireless LAN ModuleTV Tuner Card Removal Removing the TV Tuner CardTurbo Memory Card Removal Removing the Turbo Memory CardBluetooth Module Removal Removing the Bluetooth ModuleKeyboard Removal Removing the KeyboardModem Removal Removing the ModemModem Removal cont’d Inverter Board Removal Removing the Inverter BoardAppendix APart Lists Part List Illustration Location Part List Illustration LocationTop with Finger Print Top with FingerprintTop without Fingerprint Top without FingerprintBottom LCD DVD Combo Drive DVD Combo DriveDVD Super-Multi Drive DVD Super-Multi DriveSchematic Diagrams Appendix BSchematic DiagramsSheet 1 System Block DiagramSheet 2 Penryn 1/2 Penryn 1/2TH E R MD a TH E R MD CSheet 3 Penryn 2/2 Penryn 2/2LE R T A T aSheet 4 Cantiga 1/5 Host Cantiga 1/5 HostN T I G a Sheet 5 Crestline 2/6 PEG Cantiga 2/6 PEGR C O MP LK D R E FSheet 6 Crestline 3/6 DDR Cantiga 3/6 DDRSheet 7 Crestline 4/6 Crestline 4/6 POWER1Sheet 8 Cantiga 5/6 GND Cantiga 5/6 GND9 1 GP LL1 0 , 11 , 2 8 , 3 1 1 4 , 1 3 , 16 , 2 3 , 3 2 1 5V SSheet 10 DDR3 SO-DIMMD S P D T E S TSheet 11 Sheet 12 LCD,CPU FANSheet 13 ICH9-M 1/4 SataSheet 14 ICH9-M 2/4 PCI,USBSheet 15 Sheet 16 ICH9-M 4/4 ICH9-M 4/4C0 USB Sheet 17 ODD, PC BEEP, USB2.0 & eSATAOU T GN D4Sheet 18 Clock GENERATOR, CCDSheet 19 PCI-E LAN RTL8111CRTL8111C C SSheet 20 Card Reader & 1394 JMB3801394 JMB380 Sheet 21 NEW CardSheet 22 of 42 KBC-ITE IT8512 KBC-ITE IT8512I G H T N E S S TP C L KSheet 23 HdmiMI C LK 4 1 LE D B a T C H G # Sheet 24E D B a T F U L L # 3 6 W L a N E ND I F -OU T Azalia Codec ALC662GH OU T JH E a D P H on E -RSPKOUTR+ MUTEAPM#Spkoutr Muteapm SPKOUTL+ Spkoutl H822 KBCMUTE#Sheet 27 SRSAlazia MDC CRT, INV, MDC, BT, PwrgdT CO N Sheet 29 Power Charger, DCI N E FSheet 30 Power GPU Power GPURA M P GS SSheet 31 Power 1.5V Power 1.5VGO OD Power 1.8VS/ 1.05VSSheet 33 Power 3VS, 5VS Power S/W Power 3VS, 5VS, Power S/WSheet 34 Power VDD3 VDD5/ 3.3V Power VDD3/ VDD5/ 3.3VS B L LD O5C S E N S E Sheet 35 Power Vcore for Penryn CPUS S E N S E R S LSheet 36 Mini CARD, CIRSheet 37 MXM PCI-E TYPE-IVSheet 38 Board to board Board to board CONGCON1 Sheet 39 Button BoardSheet 40 of 42 Click Board Click BoardSheet 41 Fingerprint Board Fingerprint BoardLedr *LEDR Debug BoardCLR GND QH 80CL K- FHSchematic Diagrams
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