Optimized for virtualization and database applications with maximum memory and compute capacity in a blade
|
| – Understand your power requirements with IBM Power Configurator |
|
| – Monitor, control and virtualize your power with IBM Systems Director Active Energy Manager |
|
| – Reduce data center hot spots with the IBM Rear Door Heat eXchanger |
|
| – Optimize and |
|
| • Our |
|
| • Become more energy efficient with IBM expertise |
|
|
|
Key Features |
| Multicore Intel Xeon Processors |
|
| The HX5 ships with 1 or 2 |
|
| blade. By connecting 2 blades together, the HX5 servers also go a step further by allowing you |
|
| to increase the number of sockets from 2 to as many as 4. The choice of processors includes: |
|
| • 130W |
|
| core (16.25W), 6.4 GTps (gigatransfers per second) QPI speed, 978MHz memory access, dual |
|
| integrated memory controllers, 24MB of shared L3 cache, and Intel Turbo Boost and Hyper- |
|
| Threading technology; supported in BladeCenter H, HT, and S chassis |
|
| • 130W |
|
| core (16.25W), 6.4 GTps QPI speed, 978MHz memory access, dual integrated memory controllers, |
|
| 18MB of shared L3 cache, and Intel Turbo Boost and |
|
| BladeCenter H, HT, and S chassis |
|
| • 95W |
|
| draw per core (11.9W), 5.86 GTps QPI speed, 978MHz memory access, dual integrated memory |
|
| controllers, 24MB of shared L3 cache, and Intel Turbo Boost and |
|
| supported in BladeCenter H, HT, and S chassis |
|
| • 105W |
|
| core (17.5W), 6.4 GTps QPI speed, 978MHz memory access, dual integrated memory controllers, |
|
| 18MB of shared L3 cache, and Intel Turbo Boost and |
|
| BladeCenter H, HT, and S chassis |
|
| • 105W |
|
| core (17.5W), 5.86 GTps QPI speed,978MHz memory access, dual integrated memory controllers, |
|
| 12MB of shared L3 cache, and Intel Turbo Boost and |
|
| BladeCenter H, HT, and S chassis |
|
| • 95W |
|
| per core (23.75W), 4.8 GTps QPI speed, 800MHz memory access, dual integrated memory |
|
| controllers, 18MB of shared L3 cache, and Intel |
|
| BladeCenter H, HT, and S chassis |
|
| • 105W |
|
| core (17.7W), 5.86 GTps QPI speed, 1066MHz memory access, dual integrated memory controllers, |
|
| 18MB of shared L3 cache, and Intel Turbo Boost and |
|
| BladeCenter H, HT, and S chassis |
|
| • 105W |
|
| draw per core (26.25W), 4.8 GTps QPI speed, 800MHz memory access, dual integrated memory |
|
| controllers, 12MB of shared L3 cache (available via CTO) , and Intel |
|
| supported in BladeCenter H, HT, and S chassis |
|
| * This processor is limited to |
|
| Note: Because of the integrated memory controllers the former |
|
| exists. |
|
| With the Xeon 7500 series processors, Intel has diverged from its traditional Symmetric |
|
| Multiprocessing (SMP) architecture to a |
|
| Xeon 7500 processors are connected through three serial coherency links called QuickPath |
|
| Interconnect (QPI). QPI is capable of up to 6.4GTps (gigatransfers per second), depending on |
|
| the processor model. |
|
| The |
|
| processor contains one L3 cache, shared by all the cores. The cores appear to software as |
|
| separate physical processors. |
|
| of a |
|
| processors contain 8 processor cores and 16 threads. They can offer more than double the |
|
| performance of |
|
| core processors contain six processor cores. |
|
| Each processor includes two integrated memory controllers, to reduce memory bottlenecks and |
|
| improve performance. |
|
| Intelligent Power Capability powers individual processor elements on and off as needed, to |
|
| reduce power draw. |
|
|
|
| 6. | |
| Please see the Legal Information section for important notices and information. |