Optimized for virtualization and database applications with maximum memory and compute capacity in a blade
Intel’s Virtualization Technology (VT) integrates
DDR3 Registered Memory with Active Memory Protection
The HX5 uses registered double data rate III (DDR3) VLP
The HX5 supports up to 128GB of memory in 16 DIMM slots. Redesign in the architecture of the Xeon 7500 series processors bring radical changes in the way memory works in these servers. For example, the 7500 series processors integrate 2 memory controllers inside each processor, resulting in four memory controllers in a
Redesign in the architecture of the x7500 series processors bring radical changes in the way memory works in these servers. For example, the Xeon 7500 series processors integrate two memory controllers inside each processor, resulting in four memory controllers in a two- socket system. Each processor has four memory channels.
Note: If only one processor is installed, only eight DIMM slots (up to 64GB) can be used. There are two ways to expand memory beyond 8 DIMMs. Adding a second processor not only doubles the amount of memory available for use, but also doubles the number of memory controllers, thus doubling the system memory bandwidth. If you add a second processor, but no additional memory for the second processor, the second processor has to access the memory from the first processor “remotely,” resulting in longer latencies and lower performance. The latency to access remote memory is almost 75% higher than local memory access. So, the goal should be to always populate both processors with memory.
Alternatively, you can add a MAX5 memory expansion blade, containing 24 more DIMM slots with up to 192GB of memory. This offers up to 32 DIMMs and 256GB of memory with only a single processor. Adding the second processor allows the use of 8 more DIMM slots inside the HX5 and a grand total of 40 DIMMs and 320GB of memory in a
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Notes: DIMMs must be installed in matching pairs. Also, each CPU requires at least 2 DIMMs. It is important to ensure that all memory channels in each processor are populated. The relative memory bandwidth decreases as the number of channels populated decreases. This is because the bandwidth of all the memory channels is utilized to support the capability of the processor. So, as the channels are decreased, the burden to support the requisite bandwidth is increased on the remaining channels, causing them to become a bottleneck.
For peak performance:
•Always populate processors with equal amounts of memory to enable a balanced NUMA system
•Always populate both memory channels on each processor with equal memory capacity
•Ensure an even number of ranks are populated per channel
Power guidelines:
•Fewer larger DIMMs (for example 8 x 4GB DIMMs vs. 16 x 2GB DIMMs will generally have lower power requirements
•x8 DIMMs (x8 data width of rank) will generally draw less power than equivalently sized x4 DIMMs
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