IBM 6.00E+01 manual Copper and Cmos technology, Processor deallocation

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2.1.3 Copper and CMOS technology

Copper is a superior conductor of electricity, making it possible to shrink electronic devices even further while increasing performance. It has less resistance than aluminum and, therefore, allows designs that transmit electrical signals faster. However, it does not mix as well with silicon, the base material of semiconductor chips. IBM researchers found a way to put a microscopic barrier between the copper and silicon in a way that actually reduced the number of steps needed to complete a chip. With this development, IBM is able to squeeze down the widths of copper wires to the 0.2-micron range from the current 0.35-micron widths

-a reduction far more difficult for aluminum. A single POWER3-II chip contains about 400 meters of copper wiring. This technology, called CMOS 7S, is the first to use copper instead of aluminum to create the circuitry on silicon wafers. Copper wires conduct electricity with about 40 percent less resistance than aluminum. That improves processor performance and reliability while using less power and producing less heat, thus conserving energy for both operations and cooling.

2.1.4Processor deallocation

In general, there are two options available to deallocate a processor within an SMP system, which are described in more detail in the following sections:

1.Processor Boot Time Deconfiguration

2.Processor Run-Time Deconfiguration (Dynamic Processor Deallocation)

The capability of Dynamic Processor Deallocation is only active in systems with more than two processors, because device drivers and kernel extensions, which are common to multi-processor and uniprocessor systems, would change their mode to uniprocessor mode with unpredictable results. Therefore, it could not be used in the Models 6C1 and 6E1.

Processor boot time deconfiguration within an SMP system

Processor boot time deconfiguration within an SMP system is a function implemented in the system and service processor firmware of the Models 6C1 and 6E1 for deallocating a processor from the system configuration at boot time. The objective is to minimize system failure or data integrity exposure due to a faulty processor.

The processor that is deconfigured remain offline for subsequent reboots until the faulty processor hardware is replaced. This function provides the option for a user to manually deconfigure or re-enable a previously deconfigured processor using the Service Processor menu.

Note: Processor cards only can physically be removed when the power is turned off to the entire system.

If the system processor in slot 1 (P1-C1) has been deconfigured by the system, the service processor will prevent the system from booting.

How to disable the second processor manually

A additional processor in Models 6C1 and 6E1 can be disabled only within the Service Processor menus. There is no need to remove them from the system. The cpu_state command, used on the micro-channel SMP servers, is not supported on the PCI-based systems.

Chapter 2. Architecture and technical overview

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Contents IBM Page International Technical Support Organization Second Edition February Contents Page Team that wrote this Whitepaper PrefaceComments welcome General description Minimum and optional featuresPage PSeries 610 Model 6C1 package layout Physical packagePSeries 610 Model 6E1 package layout IBM RS/6000 7014 Model T00 Enterprise Rack Enterprise racksRack mounting rules for Model 6C1 IBM RS/6000 7014 Model T42 Enterprise RackFlat Panel Display Options Cable management arm VGA switchCable management arm for Model 6C1 Architecture and technical overview Processor and cache POWER3-II architecture1 L1 and L2 cache Copper and Cmos technology Processor boot time deconfiguration within an SMP systemProcessor deallocation Processor clock rate State enable means that processor 0 is enabledProcessor part numbers MemoryBus bandwidth Memory boot time deconfigurationSystem bus Memory interchange with other systemsGraphics accelerators PCI-bus, slots, and adapters1 32-bit versus 64-bit PCI slots LAN adaptersInternal storage attachments Internal storageBoot options and limitations RAID configurationsBoot support and limitations of storage adapters External devices Fast bootMiscellaneous Internal devicesSoftware requirements SecurityPage Reliability, availability, and serviceability RAS features High availability solutionRemark x means available System indicator panel Light Path diagnosticsAutomatic reboot Service processorSurveillance Processor and memory boot time deconfigurationService processor restart Boot to SMS menuHot plug fans Hot plug power suppliesSerial port snoop Scsi hot swap manager Hot plug taskHandheld based systems management AccessibilitySpecial notices AIX AIX 5L IBM trademarksReferenced Web Sites System PublicationsMail address How to Get IBM RedbooksRelated Publications