IBM 6278, 6288, 6268 manual Appendix B. System address maps, Input/output Address Map

Page 44

Appendix B. System address maps

Appendix

B.

 

System

address maps

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

System

 

memory

 

map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The

first

640

KB

of

system

board

RAM is

mapped

starting

at

address hex 0000000. A 256 b

a 1 KB area of this RAM are reserved for

BIOS

data

areas. Memory

can

be mapped

detects

an

error.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure

33.

System memory map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

range (decimal)

 

 

 

Address

range

(hex)

 

Size

 

 

 

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0 K

512

K

 

 

 

 

00000–7FFFF

 

 

 

512

KB

 

 

 

 

 

Conventional

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

512

K

639 K

 

 

 

80000–9FBFF

 

 

127

KB

 

 

 

 

 

Extended

conventional

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

639

K

640

K

 

 

 

 

9FC00–9FFFF

 

 

 

1

KB

 

 

 

 

 

 

Extended

BIOS

data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

640

K

767

K

 

 

 

 

A0000–BFFFF

 

 

128

KB

 

 

 

 

 

Dynamic

 

video

memory

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

display

 

cache

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

768

K

800

K

 

 

 

 

C0000

to

C7FFF

 

32

KB

 

 

 

 

 

 

Video

ROM

BIOS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(shadowed)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

800

K

896

K

 

 

 

 

C8000–DFFFF

 

 

96 KB

 

 

 

 

 

 

PCI

space,

available

to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

adapter

ROMs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

896

K

1

MB

 

 

 

 

E0000–FFFFF

 

 

 

128

KB

 

 

 

 

 

System

ROM

BIOS

(main

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

memory

shadowed)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

MB

16

MB

 

 

 

 

100000–FFFFFF

 

 

15

MB

 

 

 

 

 

 

PCI

Space

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16

MB

4095.872

MB

 

 

1000000–FFF7FFFF

 

 

4079.5

MB

MB

 

 

 

PCI

Space

(positive

decode)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FFF80000

–FFFFFFFF

 

 

 

 

 

512

KB

 

 

System

ROM

BIOS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input/output

address

 

map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The

following

figure

lists

resource

assignments

for

the

I/O

address

map. Any addresses

shown

are

reserved.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure

34

(Page

1

 

of

3).

I/O address map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address

(Hex)

 

 

 

 

 

Size

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0000–000F

 

 

 

 

 

 

 

16

bytes

 

 

DMA

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0010–001F

 

 

 

 

 

 

16

bytes

 

 

General I/O Locations — available to PCI bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0020–0021

 

 

 

 

 

 

2

bytes

 

 

Interrupt

controller

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0022–003F

 

 

 

 

 

 

30

bytes

 

 

General

I/0 locations — available to PCI bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0022–002F

 

 

 

 

 

 

2

bytes

 

 

SMC SIO

index/data

register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0040–0043

 

 

 

 

 

 

4

bytes

 

 

Counter/timer

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0044–00FF

 

 

 

 

 

 

28

bytes

 

 

General I/0 locations — available to PCI bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0060

 

 

 

 

 

 

 

 

1

byte

 

 

Keyboard controller byte - reset IRQ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0061

 

 

 

 

 

 

 

 

1

byte

 

 

PIIX4,

System port

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0064

 

 

 

 

 

 

 

 

1

byte

 

 

Keyboard

controller,

CMD/STAT

byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0070,

bit

7

 

 

 

 

 

1

bit

 

 

Enable

NMI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0070,

bits 6:0

 

 

 

 

1

bit

 

 

Real

time

clock,

address

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0071

 

 

 

 

 

 

 

 

1

byte

 

 

Real

time

clock,

data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0072–007F

 

 

 

 

 

 

 

14

bytes

 

 

General

I/O

locations

— available

to

PCI bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

36

Copyright IBM Corp. September 1999

Image 44
Contents Technical Information Manual PC 300GL Types 6268, 6278, 1999 ApplyAre WithContents Bios System softwarePost System compatibilityUSB port Internal Dasd 26. J13 Modem/Ring Wakeup Connector Pin AssignmentsSystem board Keyboard port Preface Related publicationsTerminology usage IBMWhen Expressing storage Capacity MB equals Viii Technical Information Manual System overview Major featuresSystem overview Other features Network supportRing Ring DetectFeatures Chapter SystemSystem memory PCI busSdram DimmBus IDE bus master interfaceUSB interface Video subsystem Graphics memory controller hub Super Video Graphics ArrayAPM AcpiSupported Enhanced VGA video modes PC 300GL supports the following video subsystem modesSupported VGA video modes Features Mode Screen Resolution Colors Refresh RateMonitor support Video memoryAudio subsystem ControllerDiskette drive interface Serial portsDefault setting for the serial port is COM1 Parallel portKeyboard and mouse ports Serial port assignmentsNetwork connection Flash EepromExpansion adapters ClockCable connectors Bios configuration jumper J7A1Physical layout JumperConnector panel Connector panel for the desktop modelPhysical specifications Physical specificationsDesktop Computers Not SupportCabling RequirementsPower supply Power inputPower output Power supplyComponents draw less current than Maximum Shown For Each PCI connectorComponent outputs Power That Available Nominal Value PowerOutputs Connector pin Assignments See Appendix a Pin Power supplySystem software System softwarePlay Configuration/Setup Utility program Advanced Configuration and Power InterfaceDiagnostic program UtilitySystem compatibility Hardware compatibilityHardware interrupts System compatibilityDrive type 720 KB Mode MB Mode Hard disk drives and controllerMachine-sensitive programs Software compatibilitySoftware interrupts Appendix A. Connector pin assignments Monitor connectorMemory connectors Appendix A. Connector pin assignmentsConnector Pin X64 Non-Parity X72 ECCAssignments Connector pinSystem memory connector pin input/output Pin Assignments 3. System memory connector pin input/outputPin Signal Name PCI connectors PCI bus connector PCI connector pin assignmentsConnector PinIDE connectors IDE connector pin assignmentsSupply Diskette Drive Connector Pin AssignmentsDrive Wakeup and Wake on LAN connectors USB port connectorsPort KeyboardSerial port connector Keyboard port connector pin assignmentsSerial Port Connector Pin Assignments Parallel port connector pin assignments2. Parallel port connector pin assignments Appendix B. System address maps SystemAppendix SystemMaps ICH1, DMAAre Reserved O address mapDMA I/O address map Bits Byte PointerSystem address maps ConfigurationMap Appendix C. IRQ and DMA channel assignments Appendix C. IRQ and DMA channel assignmentsIRQ channel assignments DMA channel assignmentsAppendix D. Error Codes Error CodesBeep codes Complete ListAppendix E. Notices and trademarks References This PublicationReference 300Advanced Power SpecificationLow Pin Count Interface Specification ReferencesIndex IndexError Codes Power Consumption Description For

6278, 6268, 6288 specifications

The IBM 6278, 6288, and 6268 are part of IBM's extensive lineup of mid-range computers, specifically tailored for business environments in the late 1980s and early 1990s. These systems were designed to handle substantial data processing tasks, facilitating efficient business operations with robust performance and reliability.

The IBM 6278 was notable for its high-performance capabilities, making it suitable for a variety of applications ranging from transaction processing to complex computations. One of the main features of the 6278 was its multiprocessing capability, which allowed it to run multiple tasks concurrently. This was achieved through a combination of advanced hardware and software that optimized performance and resource allocation.

Similarly, the IBM 6288 was recognized for its versatility and scalability. This system incorporated enhanced memory management and was capable of handling larger workloads than its predecessors. The 6288 was designed with user-friendly interfaces and supported various input/output devices, making it easier for organizations to integrate into existing IT infrastructures. Additionally, it provided improved connectivity options, essential for modern networking needs at the time.

The IBM 6268, on the other hand, offered a balance between cost and performance, appealing to smaller businesses or those with less intensive data processing requirements. Despite being less powerful than the 6278 and 6288, the 6268 still managed to include essential features such as reliable data storage, effective processing speed, and compatibility with IBM's extensive software ecosystem.

All three models utilized IBM's proprietary operating systems, which were well-known for their robustness and security features. They were built with technologies such as error detection and correction, ensuring the integrity of data processing tasks. The architecture of these systems also allowed for easy upgrades, enabling businesses to expand their capabilities without a complete overhaul of their IT infrastructure.

In summary, the IBM 6278, 6288, and 6268 represented a significant advancement in mid-range computing technology during their era. Their main features encompassed multiprocessing, scalability, and user-friendly interfaces, making them valuable assets for businesses seeking reliable and efficient computing solutions. These systems laid the groundwork for future innovations in business computing, and despite their age, they remain a significant part of IBM's legacy in the computing industry.