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The UltraSPARC T2 Processor with CoolThreads Technology

Sun Microsystems, Inc.

simply increasing the number of cores would have gained additional throughput, but would have resulted in consuming extra die area, leaving no room for integrated components such as floating point processors.

The final UltraSPARC T2 processor design recognizes that memory latency is truly the bottleneck to improving performance. By increasing the number of threads supported by each core, and by further increasing network bandwidth, the UltraSPARC T2 is able provide approximately twice the throughput of the UltraSPARC T1 processor. Each UltraSPARC T2 processor provides up to eight cores, with each core able to switch between up to eight threads (64 threads per processor). In addition, each core provides two integer execution units, so that a single UltraSPARC core is capable of executing two threads at a time. Figure 4 provides a simplified high-level illustration of the thread model supported by an eight-core UltraSPARC T2 processor.

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Figure 4. A single eight-core UltraSPARC T2 processor supports up to 64 threads, with up to two threads running in each core simultaneously

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Contents Server Architecture Table of Contents Executive Summary Evolution of Chip Multithreading CMT Business Challenges for WebBuilding out for Web Scale Rule-Changing Chip Multithreading CMT Technology Driving Datacenter Virtualization and Eco-EfficiencySecuring the Enterprise at Speed Chip Multiprocessing with Multicore Processors Chip Multithreading CMT with CoolThreads Technology UltraSPARC T2 Processor with CoolThreads Technology Sun Sparc Enterprise T5120 and T5220 ServersSun Sparc Enterprise T5120 and T5220 servers Industrys Most Open Platform Efficient and Predictable ScalabilityAccelerated Time to Market Simplified ManagementTradition of Leading Eco Efficiency System and Datacenter ReliabilityZero-Cost Security Space, Watts, and Performance Introducing the SWaP Metric UltraSPARC T2 Processor with CoolThreads Technology Taking Chip Multithreaded Design to the Next Level Memory Latency ComputeTime FB Dimm UltraSPARC T2 Processor ArchitectureUltraSPARC T2 Core Architecture and Pipelines UltraSPARC T2 core block diagramUltraSPARC T2 per-core integer and floating-point pipelines Integrated Networking Stream Processing UnitIntegral PCI Express Support Power Management System-Level Architecture Sun Sparc Enterprise T5120 and T5220 Server ArchitectureSubsystem Memory SubsystemEnclosure Sun Sparc Enterprise T5120 Server OverviewSun Sparc Enterprise T5120 server, front and rear panels Front and Rear PerspectivesSun Sparc Enterprise T5220 Server Overview Sun Sparc Enterprise T5220 server, front and rear panels Integrated Lights-Out Management Ilom System Controller System Management TechnologyGroup Sun Management Center SoftwareSun N1 System Manager DiscoverMonitor ManageHybrid User Interface Fine-Granularity Manageability Enterprise-Class SoftwareScalability and Support for CoolThreads Technology CMT AwarenessEnd-to-End Virtualization Technology Solaris ZFS File SystemSecure and Robust Enterprise-Class Environment Container User Resource Management Fault Management and Predictive Self HealingSolaris Fault Manager Solaris ZonesSolaris Service Manager Tuning and Debugging Application SelectionDevelopment Deployment Sun Java Enterprise System Java ESEnterprise-Class Software Enterprise-Class Software For More Information ConclusionWeb Site URL Description Sun Sparc Enterprise T5120 and T5220 Server Architecture