Delta Electronics Series DNM04 Test Configurations, Design Considerations, Input Source Impedance

TEST CONFIGURATIONS

	TO OSCILLOSCOPE
	L	VI(+)
BATTERY	2	100uF
	Tantalum
		VI(-)

Note: Input reflected-ripple current is measured with a simulated source inductance. Current is measured at the input of the module.

Figure 29: Input reflected-ripple test setup

COPPER STRIP
Vo
10uF	1uF	SCOPE	Resistive
tantalum ceramic			Load

GND

Note: Use a 10μF tantalum and 1μF capacitor. Scope measurement should be made using a BNC cable.

Figure 30: Peak-peak output noise and startup transient measurement test setup.

			CONTACT AND
			DISTRIBUTION LOSSES
	VI	Vo
II			Io
SUPPLY	Vin	Vo	LOAD
	GND

CONTACT RESISTANCE

Figure 31: Output voltage and efficiency measurement test setup

Note: All measurements are taken at the module terminals. When the module is not soldered (via socket), place Kelvin connections at module terminals to avoid measurement errors due to contact resistance.

η = (Vo ⋅ Io) ⋅100 %

Vi ⋅ Ii

DESIGN CONSIDERATIONS

Input Source Impedance

To maintain low noise and ripple at the input voltage, it is critical to use low ESR capacitors at the input to the module. Figure 32 shows the input ripple voltage (mVp-p) for various output models using 200 µF(2 x100uF) low ESR tantalum capacitor (KEMET p/n: T491D107M016AS, AVX p/n: TAJD107M106R, or equivalent) in parallel with 47 µF ceramic capacitor (TDK p/n:C5750X7R1C476M or equivalent). Figure 33 shows much lower input voltage ripple when input capacitance is increased to 400 µF (4 x 100 µF) tantalum capacitors in parallel with 94 µF (2 x 47 µF) ceramic capacitor.

The input capacitance should be able to handle an AC ripple current of at least:

Irms = Iout	Vout ⎛		−	Vout ⎞
	Vin	⎜1		Vin	⎟ Arms
		⎝			⎠

-p)	350
(mVp	300
	250
Voltage
	200
	150
Ripple
	100				5.0Vin
Input	50				3.3Vin
	0
	0	1	2	3	4

Output Voltage (Vdc)

Figure 32: Input voltage ripple for various output models, IO = 10 A (CIN = 2×100 µF tantalum // 47 µF ceramic)

(mVp-p)	200
	150
Ripple Voltage	100
	50				5.0Vin
Input					3.3Vin
	0
	0	1	2	3	4

Output Voltage (Vdc)

Figure 33: Input voltage ripple for various output models, IO = 10 A (CIN = 4×100 µF tantalum // 2×47 µF ceramic)

DS_DNM04SIP10_07162008D

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