Board Layout | Texas Instruments TPS65023B, TPS650231EVM instruction

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VOUT _ DCDC2,MIN = V _ REF × (1 + R1 )) + (V _ REF − VLDO2,MAX) × ( R1 )

R2		R3
		(2)
VOUT _ DCDC2,MAX = V _ REF × (1 +	R1	)) + (V _ REF − VLDO2,MIN) × (	R1	)

	R2		R3
		(3)

The most straight forward way is to choose a value for R6 according to the recommendations in the converter data sheet.

4Board Layout

This section provides the TPS65023B/TPS650231EVM-664 board layout and illustrations.

4.1Layout

Board layout is critical for all switch mode power supplies. Figure 1 through Figure 5 show the board layout for the TPS65023B/TPS650231EVM-664 PCB. The nodes with high switching frequencies and currents are short and are isolated from the noise-sensitive feedback circuitry. Careful attention has been given to the routing of high-frequency current loops. See the data sheet for specific layout guidelines.

Figure 1. Assembly Layer

6	TPS65023B/TPS650231EVM	SLVU394 –October 2010
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VOUT _ DCDC2,MIN = V _ REF × (1 + R1 )) + (V _ REF − VLDO2,MAX) × ( R1 )

VOUT _ DCDC2,MAX = V _ REF × (1 +

)) + (V _ REF − VLDO2,MIN) × (

4Board Layout

4.1Layout

Figure 1. Assembly Layer