Cypress STK14D88 manual Features, Description, Logic Block Diagram

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STK14D88

32Kx8 AutoStore™ nvSRAM

Features

25, 35, 45 ns Read Access and R/W Cycle Time

Unlimited Read/Write Endurance

Automatic Nonvolatile STORE on Power Loss

Nonvolatile STORE Under Hardware or Software Control

Automatic RECALL to SRAM on Power Up

Unlimited RECALL Cycles

200K STORE Cycles

20-Year Nonvolatile Data Retention

Single 3.0V +20%, -10% Power Supply

Commercial, Industrial Temperatures

Small Footprint SOIC and SSOP Packages (RoHS-Compliant)

Description

The Cypress STK14D88 is a 256Kb fast static RAM with a nonvolatile Quantum Trap™ storage element included with each memory cell.

The SRAM provides fast access and cycle times, ease of use, and unlimited read and write endurance of a normal SRAM.

Data transfers automatically to the nonvolatile storage cells when power loss is detected (the STORE operation). On power up, data is automatically restored to the SRAM (the RECALL operation). Both STORE and RECALL operations are also available under software control.

The Cypress nvSRAM is the first monolithic nonvolatile memory to offer unlimited writes and reads. It is the highest performance, most reliable nonvolatile memory available.

Logic Block Diagram

Quantum Trap

VCCX VCAP

A5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A6

 

 

 

 

 

 

DECODER

 

 

 

 

 

 

 

 

 

A7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A8

 

 

 

 

 

 

 

 

 

 

 

 

A9

 

 

 

 

 

 

 

 

 

 

 

A11

 

 

 

ROW

 

 

 

 

 

A13

A12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A14

DQ0

DQ1

 

 

 

 

 

 

 

 

 

 

 

 

BUFFERS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ4

 

 

 

 

 

 

 

 

 

INPUT

 

 

 

 

 

 

 

 

 

 

 

 

DQ6

 

 

 

 

 

 

 

 

 

 

 

DQ5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

512 x 512

STORE

STATIC RAM

ARRAY RECALL 512 x 512

COLUMN I/O

COLUMN DEC

A0 A1 A2 A3 A4 A10

POWER

CONTROL

STORE/

RECALL

CONTROL

SOFTWARE

DETECT

HSB

A0 - A13

G

E

W

Cypress Semiconductor Corporation • 198 Champion Court

San Jose, CA 95134-1709

408-943-2600

Document Number: 001-52037 Rev. **

 

Revised March 02, 2009

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Contents Logic Block Diagram FeaturesDescription Cypress Semiconductor Corporation 198 Champion CourtPin Descriptions Pin ConfigurationsSymbol Parameter2 Commercial Industrial Unit Min DC CharacteristicsAbsolute Maximum Ratings AC Test Conditions Symbol Parameter2 Commercial Industrial Unit Min MaxCapacitance Parameter3 Description Test ConditionsSram Read Cycles #1 and #2 Sram Write Cycle #1 and #2 Symbols Alt Parameter STK14D88 Unit Min Max AutoStore/POWER UP RecallSoftware-Controlled STORE/RECALL Cycle13 Symbols Parameter STK14D88 Unit Standard Alternate Min Soft Sequence CommandsSymbols Parameter STK14D88 Unit Standard Min Hardware Store CycleA14-A0 Mode Power Mode SelectionNvSRAM Operation Software Recall Low Average Active PowerData Protection Best PracticesPreventing AutoStore Noise ConsiderationsPart Numbering Nomenclature Part Number Description Access Times TemperatureOrdering Codes STK14D88 R F 45 I TRPin 300 Mil Soic Package DiagramsPin 300 Mil Ssop Worldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationDocument History