Cypress STK14D88 manual Mode Selection, A14-A0 Mode Power

								STK14D88
Mode Selection
	E	W	G	A14–A0	Mode	IO	Power		Notes
H		X	X	X	Not Selected	Output High Z	Standby
	L	H	L	X	Read SRAM	Output Data	Active
	L	L	X	X	Write SRAM	Input Data	Active
	L	H	L	0x0E38	Read SRAM	Output Data	Active		18, 19, 20
				0x31C7	Read SRAM	Output Data
				0x03E0	Read SRAM	Output Data
				0x3C1F	Read SRAM	Output Data
				0x303F	Read SRAM	Output Data
				0x03F8	AutoStore Disable	Output Data
	L	H	L	0x0E38	Read SRAM	Output Data	Active		18, 19, 20
				0x31C7	Read SRAM	Output Data
				0x03E0	Read SRAM	Output Data
				0x3C1F	Read SRAM	Output Data
				0x303F	Read SRAM	Output Data
				0x07F0	AutoStore Enable	Output Data
	L	H	L	0x0E38	Read SRAM	Output Data			18, 19, 20
				0x31C7	Read SRAM	Output Data
				0x03E0	Read SRAM	Output Data	Active
				0x3C1F	Read SRAM	Output Data
				0x303F	Read SRAM	Output Data
				0x0FC0	Nonvolatile Store	Output High Z	ICC2
	L	H	L	0x0E38	Read SRAM	Output Data	Active		18, 19, 20
				0x31C7	Read SRAM	Output Data
				0x03E0	Read SRAM	Output Data
				0x3C1F	Read SRAM	Output Data
				0x303F	Read SRAM	Output Data
				0x0C63	Nonvolatile Recall	Output High Z

Notes

18.The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.

19.While there are 15 addresses on the STK14D88, only the lower 14 are used to control software modes

20.I/O state depends on the state of G. The I/O table shown assumes G low.

Document Number: 001-52037 Rev. ** Page 10 of 17

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