CY7C1018CV33
Switching Waveforms
Read Cycle No. 1[11, 12]
tRC
ADDRESS
tAA
tOHA
DATA OUT | PREVIOUS DATA VALID |
DATA VALID
Read Cycle No. 2 (OE Controlled)[12, 13] |
|
| |
ADDRESS |
|
|
|
|
| tRC |
|
CE |
|
|
|
| tACE |
|
|
OE |
| tHZOE |
|
| tDOE |
| |
| tHZCE |
| |
| tLZOE | HIGH | |
DATA OUT | HIGH IMPEDANCE | DATA VALID | IMPEDANCE |
|
| ||
| tLZCE | tPD |
|
VCC | tPU | ICC | |
SUPPLY | 50% |
| 50% |
CURRENT |
|
| ISB |
Write Cycle No. 1 (CE Controlled)[14, 15]
| tWC |
| |
ADDRESS |
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| |
| tSCE |
| |
CE |
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| |
tSA |
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| |
tAW | tSCE | tHA | |
tPWE | |||
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| ||
WE |
|
| |
| tSD | tHD | |
DATA I/O | DATA VALID |
| |
Notes: |
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|
11.Device is continuously selected. OE, CE = VIL.
12.WE is HIGH for Read cycle.
13.Address valid prior to or coincident with CE transition LOW.
14.Data I/O is high impedance if OE = VIH.
15.If CE goes HIGH simultaneously with WE going HIGH, the output remains in a
Document #: | Page 4 of 7 |
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